Display substrate, preparation method thereof and display device
A technology for display substrates and substrate substrates, which is applied in semiconductor/solid-state device manufacturing, optics, instruments, etc., and can solve problems such as the reduction of the aperture ratio of pixel units.
Pending Publication Date: 2021-11-23
BOE TECH GRP CO LTD
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Problems solved by technology
[0003] The inventors have found that there is a problem in the prior art: as the channel width of the thin film transistor in the pixel unit increases, the aperture ratio of the pixel unit decreases continuously
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[0054] Second aspect, such as Figure 6-Figure 14As shown, the embodiment of the present disclosure provides a method for manufacturing a display substrate, the method comprising: providing a base substrate 1, forming a pattern including a plurality of gate lines 11 and a plurality of data lines 12 on the base substrate 1, The pattern of the gate line 11 and the pattern of the data line 12 intersect to form a plurality of pixel units; the step of forming each pixel unit in the plurality of pixel units includes forming a switching device and a pixel electrode 13 on the base substrate 1; A first interlayer dielectric layer 14 is formed between the layer where the electrode 13 is and the layer where the data line 12 is; graphics. Wherein, the orthographic projection of the semiconductor active layer 15 on the base substrate 1 is located within the orthographic projection of the data line 12 on the base substrate 1 . The step of forming the semiconductor active layer 15 includes...
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Abstract
The invention provides a display substrate, a preparation method thereof and a display device, and belongs to the technical field of display. The display substrate provided by the invention comprises a substrate, a plurality of grid lines and a plurality of data lines, wherein the grid lines and the data lines are arranged on the substrate. Pixel units are arranged in the intersection areas of the grid lines and the data lines, wherein each pixel unit at least comprises a switching device and a pixel electrode; a first interlayer dielectric layer is arranged between the layer where the pixel electrode is located and the layer where the data line is located; the switching device comprises a semiconductor active layer, and the orthographic projection of the semiconductor active layer on the substrate is located in the orthographic projection of the data line on the substrate; the semiconductor active layer is divided into a first connection region, a second connection region and a channel region located between the first connection region and the second connection region; for any pixel unit, the first connecting area of the semiconductor active layer is electrically connected with the data line defining the pixel unit, and the second connecting area of the semiconductor active layer is electrically connected with the pixel electrode defining the pixel unit.
Description
technical field [0001] The disclosure belongs to the field of display technology, and in particular relates to a display substrate, a preparation method thereof, and a display device. Background technique [0002] With the improvement of people's requirements for display images, high-resolution (pixels per inch, PPI) display devices represented by virtual reality (Virtual Reality, VR) devices have attracted increasing attention. In order to achieve a preset display effect for a high-PPI display device, higher requirements are put forward for the pixel unit in the display device. In existing display devices, the aperture ratio of a pixel unit is an important factor affecting the design and brightness of the display device. [0003] The inventors have found that there is a problem in the prior art: with the increase of the channel width of the thin film transistor in the pixel unit, the aperture ratio of the pixel unit decreases continuously. Therefore, proposing a new type ...
Claims
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IPC IPC(8): H01L27/12H01L21/77G02F1/1362G02F1/1368G02F1/1343
CPCH01L27/1222H01L27/124H01L27/1259G02F1/1362G02F1/1368G02F1/136286G02F1/134309
Inventor 王利忠胡合合雷利平姚念琦薛大鹏董水浪
Owner BOE TECH GRP CO LTD