A Synchronization Method of Different Frequency Clock Signals

A clock signal and frequency technology, applied in multiplex communication, time division multiplex system, electrical components, etc., can solve the problems of low frequency of signal synchronization and long synchronization time, etc., to achieve fast synchronization, good Economic benefit, time-shortening effect

Active Publication Date: 2022-03-04
成都金诺信高科技有限公司
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Problems solved by technology

For many application scenarios, the frequency of signal synchronization is too low (that is, each synchronization takes too long) to be unacceptable

Method used

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  • A Synchronization Method of Different Frequency Clock Signals

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Embodiment Construction

[0026] The technical solutions of the present invention will be clearly and completely described below in conjunction with the embodiments. Apparently, the described embodiments are only some of the embodiments of the present invention, not all of them. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without making creative efforts belong to the protection scope of the present invention.

[0027] refer to figure 1 , this embodiment provides a method for synchronizing clock signals with different frequencies:

[0028] Such as figure 1 As shown, a method for synchronizing clock signals with different frequencies, including:

[0029] S1. The first module generates an nPPS pulse signal with a period of n seconds, where n>0.

[0030] In this embodiment, the nPPS pulse signal with a period of n seconds refers to a pulse signal output once every n seconds. Generally, there is no requirement for the time information sou...

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Abstract

The invention discloses a method for synchronizing clock signals with different frequencies, comprising: a first module generates an nPPS pulse signal with a period of n seconds; performing frequency multiplication on the nPPS pulse signal to obtain a first mPPS pulse signal with a period of m seconds; Use the rising edge of the first mPPS pulse signal to trigger the counter register clearing of the second module; the second module generates the second mPPS pulse signal with a period of m seconds in a counting frequency division mode; where m and n are both greater than 0, n >m. The invention realizes the fast synchronization of the slow clock signal and the fast clock signal, shortens the time required for one synchronization, and has been used in actual project production at present, achieving better economic benefits.

Description

technical field [0001] The invention relates to the technical field of clock signal synchronization, in particular to a method for synchronizing clock signals with different frequencies. Background technique [0002] In the technical field of time unification, the problem of synchronizing an arbitrary cycle N-second pulse with a local 1-second cycle pulse is often encountered, and each synchronization requires N seconds. If the period N of a pulse with an arbitrary period of N seconds is relatively long, for example, the period is tens of seconds or several minutes, then each synchronization takes tens of seconds or even several minutes. For many application scenarios, the frequency of signal synchronization is too low (that is, each synchronization takes too long) to be unacceptable. Contents of the invention [0003] The purpose of the present invention is to overcome one or more deficiencies of the prior art and provide a method for synchronizing clock signals with dif...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H04J3/06
CPCH04J3/0617
Inventor 胡秋林曾迎春朱敏邓意峰简和兵温学斌严波李文龙杨彩芳
Owner 成都金诺信高科技有限公司
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