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SDIO inter-chip interconnect protocol extension for slow devices and power savings

A technology for extending commands and client devices, which is applied in the field of interconnection protocol expansion between secure digital input/output chips, and can solve problems such as the inability of slave devices to initiate data transmission

Pending Publication Date: 2022-04-15
QUALCOMM INC
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

A slave device operating according to the SDIO protocol cannot initiate a data transfer

Method used

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  • SDIO inter-chip interconnect protocol extension for slow devices and power savings
  • SDIO inter-chip interconnect protocol extension for slow devices and power savings
  • SDIO inter-chip interconnect protocol extension for slow devices and power savings

Examples

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Embodiment Construction

[0025] The detailed description set forth below in connection with the accompanying drawings is intended as a description of various configurations and is not intended to represent the only configurations in which the described concepts may be practiced. The detailed description includes specific details for the purpose of providing a thorough understanding of various concepts. It will be apparent, however, to one skilled in the art that these concepts may be practiced without these specific details. In some instances, well-known structures and components are shown in block diagram form in order to avoid obscuring the concepts.

[0026] Based on the teachings, those skilled in the art should appreciate that the scope of the present disclosure is intended to cover any aspect of the present disclosure, whether implemented independently of or in combination with any other aspect of the present disclosure. For example, an apparatus may be implemented or a method practiced using a...

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Abstract

A method of improving synchronization between an SD host and an SD client device over a secure digital (SD) bus is described. In one embodiment, a method includes writing a client event register to interrupt an SD host for an SD extension command. The method further includes triggering the SD host to issue an SD extension command to the SD client device through the SD bus in response to the SD client device writing the client event register.

Description

[0001] Cross References to Related Applications [0002] This application claims the benefit of U.S. Patent Application No. 16 / 938,845, filed July 24, 2020, entitled "SDIO CHIP-TO-CHIP INTERCONNECT PROTOCOL EXTENSION FOR SLOW DEVICES AND POWER SAVINGS," which claims Interest in Indian Provisional Patent Application No. 201941036366, entitled "SDIO CHIP-TO-CHIPINTERCONNECT PROTOCOL EXTENSION FOR SLOW DEVICE AND POWER SAVINGS", filed on 10th, the disclosure of which is expressly incorporated herein by reference. technical field [0003] The present disclosure generally relates to devices incorporated into integrated circuits (ICs). More specifically, aspects of the present disclosure relate to Secure Digital (SD) Input / Output (SDIO) chip-to-chip interconnect protocol extensions for slow devices and power savings. Background technique [0004] Various types of communication links and communication protocols are used to interconnect the devices and allow the interconnected dev...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G06F13/42G06F9/46G06F9/54
CPCG06F13/4217G06F13/4291G06F13/4063Y02D10/00G06F9/542G06F9/30098G06F9/544G06F9/466
Inventor R·库马尔M·德赛D·帕克·阿里T·文卡塔拉曼S·库马尔
Owner QUALCOMM INC
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