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Task scheduling circuit and method, electronic equipment and computer readable storage medium

A task scheduling and circuit technology, applied in the field of processors, can solve the problems of inflexible task scheduling and complex control of processing cores

Pending Publication Date: 2022-05-20
STREAM COMPUTING INC
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0008] In order to solve the technical problems of inflexible task scheduling and complex control of processing cores in the prior art, embodiments of the present disclosure propose the following technical solutions:

Method used

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  • Task scheduling circuit and method, electronic equipment and computer readable storage medium
  • Task scheduling circuit and method, electronic equipment and computer readable storage medium
  • Task scheduling circuit and method, electronic equipment and computer readable storage medium

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Embodiment Construction

[0038]Embodiments of the present disclosure will be described in more detail below with reference to the accompanying drawings. Although certain embodiments of the present disclosure are shown in the drawings, it should be understood that the disclosure may be embodied in various forms and should not be construed as limited to the embodiments set forth herein; A more thorough and complete understanding of the present disclosure. It should be understood that the drawings and embodiments of the present disclosure are for exemplary purposes only, and are not intended to limit the protection scope of the present disclosure.

[0039] It should be understood that the various steps described in the method implementations of the present disclosure may be executed in different orders, and / or executed in parallel. Additionally, method embodiments may include additional steps and / or omit performing illustrated steps. The scope of the present disclosure is not limited in this regard.

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PUM

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Abstract

The embodiment of the invention discloses a task scheduling circuit and method, electronic equipment and a computer readable storage medium. The task scheduling circuit comprises a state storage circuit, a task packet scheduling circuit and a control circuit, wherein the state storage circuit is used for storing the state of each processing core; the task package scheduling circuit is used for obtaining a to-be-executed task package, and the task package comprises at least one task instruction of the same task; confirming one idle processing core in the at least two processing cores according to the state information in the state storage circuit; sending the task packet to the idle processing core; and the control circuit is used for receiving the state information of the idle processing core and indicating the task packet scheduling circuit to work according to the state information. The task scheduling circuit schedules the task packet to the processing core for execution through the state information of the processing core, and the technical problem of low scheduling efficiency in the prior art is solved.

Description

technical field [0001] The present disclosure relates to the field of processors, and in particular to a task scheduling circuit, method, electronic equipment and computer-readable storage medium. Background technique [0002] With the development of science and technology, human society is rapidly entering the age of intelligence. An important feature of the intelligent era is that people obtain more and more types of data, and the amount of data obtained is increasing, while the requirements for processing data speed are getting higher and higher. The chip is the cornerstone of task scheduling, which fundamentally determines people's ability to process data. From the perspective of application fields, there are two main routes for chips: one is the general chip route, such as CPU (Central Processing Unit), etc., which can provide great flexibility, but the effective computing power is relatively low when dealing with specific field algorithms; The other is a dedicated ch...

Claims

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Application Information

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IPC IPC(8): G06F9/48G06F9/50G06F9/38G06F9/54
CPCG06F9/4881G06F9/5066G06F9/3836G06F9/546G06F2209/548Y02D10/00
Inventor 不公告发明人
Owner STREAM COMPUTING INC