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Clock verification environment generation method and device, electronic equipment and storage medium

A verification environment and clock technology, which is applied in CAD circuit design, electrical digital data processing, computer-aided design, etc., can solve the problem of heavy development workload of the verification environment, and achieve the effect of improving verification work efficiency and reducing development workload

Pending Publication Date: 2022-07-29
HORIZON ROBOTICS SHANGHAI ARTIFICIAL INTELLIGENCE TECH CO LTD
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Problems solved by technology

[0003] In order to solve the technical problems such as the above-mentioned verification environment development workload is relatively large, this disclosure is proposed

Method used

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  • Clock verification environment generation method and device, electronic equipment and storage medium
  • Clock verification environment generation method and device, electronic equipment and storage medium
  • Clock verification environment generation method and device, electronic equipment and storage medium

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Embodiment Construction

[0025] Hereinafter, exemplary embodiments according to the present disclosure will be described in detail with reference to the accompanying drawings. Obviously, the described embodiments are only some of the embodiments of the present disclosure, not all of the embodiments of the present disclosure, and it should be understood that the present disclosure is not limited by the example embodiments described herein.

[0026] It should be noted that the relative arrangement of the components and steps, the numerical expressions and numerical values ​​set forth in these embodiments do not limit the scope of the present disclosure unless specifically stated otherwise.

[0027] Those skilled in the art can understand that terms such as "first" and "second" in the embodiments of the present disclosure are only used to distinguish different steps, devices, or modules, etc., and neither represent any specific technical meaning, nor represent any difference between them. the necessary l...

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Abstract

The embodiment of the invention discloses a clock verification environment generation method and device, electronic equipment and a storage medium, and the method comprises the steps: obtaining clock information corresponding to at least one subsystem of a system on chip; and generating a target clock verification environment corresponding to the subsystem based on the clock information corresponding to the subsystem and a pre-established subsystem clock verification environment template. According to the embodiment of the invention, the target clock verification environment corresponding to the subsystem can be quickly and automatically generated based on the clock information corresponding to any subsystem of the system on chip, so that the verification environment of each subsystem does not need to be repeatedly developed, the verification environment development workload is effectively reduced, and the verification working efficiency is improved.

Description

technical field [0001] The present disclosure relates to chip verification technology, in particular to a method, apparatus, electronic device and storage medium for generating a clock verification environment. Background technique [0002] As the chip becomes larger and larger with more functions, the structure of the clock tree becomes more and more complex. Once the clock is wrong, the entire chip or many important functions will not work properly. Validation is increasingly important. In the related art, it is usually necessary to develop a verification environment for each subsystem clock in the entire system-on-chip of the chip to verify the clocks separately. However, because the subsystems included in the system-on-chip are often many and complex, the development workload of the verification environment is large, resulting in the efficiency of verification work. lower. SUMMARY OF THE INVENTION [0003] In order to solve the above-mentioned technical problems such...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G06F30/398G06F30/396G06F115/02
CPCG06F30/398G06F30/396G06F2115/02
Inventor 薛静松胡旭
Owner HORIZON ROBOTICS SHANGHAI ARTIFICIAL INTELLIGENCE TECH CO LTD
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