Method and device for realizing systgem multiple cloc on common system
A technology for realizing system and system clock, applied in the direction of synchronization device, transmission system, digital transmission system, etc., can solve the problem of inability to realize the compatible design of DDN and PSTN
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[0022] Taking PSTN and DDN two access networks as examples, the system access side extracts multiple 2M line clocks from PSTN or DDN network respectively, and extracts two independent clocks from the lines after clock selection and sends them to two independent locks. The phase loop is phase-locked, and then outputs two independent and stable clock signals as the reference clocks of DDN and PSTN services respectively.
[0023] If there is only a single service access, the same line clock can be selected to be sent to the two phase-locked loops respectively during clock selection, and the two line clocks are synchronized on the same line clock.
[0024] As shown in Figure 1, the multi-channel system clock extraction device on the access side extracts multiple line clocks, and after passing through the clock selection device, two independent clocks CLK-1 and CLK-2 are generated and distributed to two phase-locked loops. , respectively output the stable clock signals 1 and 2 sync...
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