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Method and device for realizing systgem multiple cloc on common system

A technology for realizing system and system clock, applied in the direction of synchronization device, transmission system, digital transmission system, etc., can solve the problem of inability to realize the compatible design of DDN and PSTN

Inactive Publication Date: 2007-05-30
BEIJING YINGKAIRUI TECH DEV
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

If DDN access is to be realized, the traditional implementation method is to design a system exclusively for data processing and control of DDN access, which cannot realize the compatible design of DDN and PSTN access

Method used

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  • Method and device for realizing systgem multiple cloc on common system

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Embodiment Construction

[0022] Taking PSTN and DDN two access networks as examples, the system access side extracts multiple 2M line clocks from PSTN or DDN network respectively, and extracts two independent clocks from the lines after clock selection and sends them to two independent locks. The phase loop is phase-locked, and then outputs two independent and stable clock signals as the reference clocks of DDN and PSTN services respectively.

[0023] If there is only a single service access, the same line clock can be selected to be sent to the two phase-locked loops respectively during clock selection, and the two line clocks are synchronized on the same line clock.

[0024] As shown in Figure 1, the multi-channel system clock extraction device on the access side extracts multiple line clocks, and after passing through the clock selection device, two independent clocks CLK-1 and CLK-2 are generated and distributed to two phase-locked loops. , respectively output the stable clock signals 1 and 2 sync...

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Abstract

This invention relates to a method for realizing multiple clocks on a same system and a device. The system picks up M clocks from M lines of the cut-in side, among which, M is more than 2, N independent clock signals synchronized to different networks are output and M is more than N than 1 after selecting the said M line clocks, stabilize N clock signals synchronized to related networks are output after phase-locking of the said N independent to related networks as the multiclock signal. This invention provides multiset independent clock systems in a same system to realize multipath network cut-in with different system clocks at the same time to realize multisystem compatible without adding any hard devices.

Description

Technical field: [0001] The invention belongs to the field of computer network communication, and in particular relates to a method for realizing multiple system clocks on the same system, and a device for realizing the method. Background technique: [0002] For different access networks, the clocks cannot be completely synchronized, and different services need to be synchronized on the corresponding networks. [0003] For example, PSTN (public switching Telephone Network, public telephone network) is the public communication network with the highest popularity and the lowest cost at present. [0004] DDN (Digital Data Network, Digital Data Network) is a digital dedicated line based on synchronous digital transmission network technology. Fixed IP address realizes mutual access between networks. DDN has the characteristics of stability, reliability, security and exclusiveness. [0005] Since the PSTN network and the DDN network are two different access networks, the clocks...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H04L7/00
Inventor 沈为其
Owner BEIJING YINGKAIRUI TECH DEV