Method of transferring data in an electronic circuit, electronic circuit and relating device

Abstract

The present invention is related to a method of transferring data in an electronic circuit (10) incorporating a control unit or CPU (21), first circuit blocks (41) and second circuit blocks (61) interconnected by means of a BUS (24). The method and the relating circuit envisage the use of interface devices (45a) and / or (45b), associated to respective circuit blocks, and capable of managing the direct transfer of data from the first block (41) to the second block (61), or vice-versa, without the control by the CPU (21) during such a transfer. For the purpose of this method, and relating circuit(101), interface device (45a) must be, able to intercept control commands issued by CPU (21) and to directly manage the data transfer from the first block (41) to the second block (61) .Thus, the method and the circuit (101), and the interface device (45a) make it possible to considerably reduce the load of CPU 21, BUS 24 and electronic circuit (101) as well.

Description

technical field [0001] The invention relates to a method for transferring data in an electronic circuit, wherein said electronic circuit combines a control unit (CPU), a first circuit part with storage means and a device capable of exchanging data with said first circuit part. of the second circuit component. [0002] The invention also relates to an electronic circuit and a device designed to implement the method according to the invention. [0003] In particular, the invention relates to test subsystems capable of implementing and simulating, for example, link transmission and reception, wherein circuit components implemented as hardware components and / or firmware components coexist, and wherein the test procedure includes selection Actively activate those component functions that form the link and monitor the transfer of data, for example, from one component to another via the RAM. Background technique [0004] It is well known that the exchange of data between hardware...

AI Technical Summary

Problems solved by technology

[0016] The first technical problem in the background art is due to the fact that the bus 24 will be used twice depending on each transfer starting from the FPGA 41 (hardware part) or from the DSP (firmware part) 61 and vice versa, and Depending on the transfer from the hardware component 41 to the firmware component 61, the bus 24 will be used four times and vice versa, which will lead to an overload of the bus 24, especially if the subsystem 10 is required for real-time simulation of e.g. a transmission chain case.

[0017] The second problem of the prior art is that in any data transfer process, the CPU 21 needs to manage and monitor the data transfer step by step, all of which prevent the CPU 21 from performing additional processing functions, which are necessary for Necessary for simulation of the electronic circuit to be tested

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