Unlock instant, AI-driven research and patent intelligence for your innovation.

Wiring substrate and semiconductor device using the same

A technology for wiring substrates and wiring boards, which is applied to semiconductor devices, semiconductor/solid-state device components, and electric solid-state devices, etc., can solve the problems of easy breakage and breakage of laminated vias.

Inactive Publication Date: 2006-03-08
KK TOSHIBA
View PDF1 Cites 4 Cited by
  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

Therefore, the reduced-diameter laminated vias are likely to break due to thermal stress generated when semiconductor elements are mounted on the package substrate or thermal stress due to the operating temperature of the semiconductor elements.
In particular, when using laminated vias for power supply vias, breakage tends to occur as the via diameter decreases

Method used

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
View more

Image

Smart Image Click on the blue labels to locate them in the text.
Viewing Examples
Smart Image
  • Wiring substrate and semiconductor device using the same
  • Wiring substrate and semiconductor device using the same
  • Wiring substrate and semiconductor device using the same

Examples

Experimental program
Comparison scheme
Effect test

Embodiment Construction

[0015] Hereinafter, modes for carrying out the present invention will be described with reference to the drawings. In addition, although embodiment of this invention is described below with reference to drawings, these drawings are provided for illustration only, and this invention is not limited to these drawings.

[0016] figure 1 It is a cross-sectional view showing the structure of the wiring board according to the first embodiment of the present invention. figure 2 It is an enlarged cross-sectional view showing its main parts. The wiring board 1 shown in these figures includes an inner-layer wiring board 3 having a through-hole portion (via-hole conduction portion) 2 in which a conductor layer is formed in the through-hole. The inner layer wiring board 3 is made of resin substrates such as glass epoxy resin substrates, viscose maleimide (BT) resin substrates, polyimide resin substrates, and fluorine resin substrates.

[0017] The resin substrate constituting the inner...

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to View More

PUM

No PUM Login to View More

Abstract

A wiring substrate provides an inner wiring substrate having through hole portions. On at least one main surface of the inner wiring substrate, a plurality of build up layers are laminated. The build up layers have a stacked via, for example, as a power source system via. The stacked via is formed by stacking the vias in multiple steps to form a straight line. The stacked via has a large diameter via which is larger than other via constituting the stacked via, or is constituted of large diameter vias larger than other via in the same build up layer.

Description

technical field [0001] The present invention relates to a wiring substrate used for a package substrate of a semiconductor element, etc., and a semiconductor device using the same. Background technique [0002] Packaging substrates for semiconductor elements are required to have high-density wiring. Therefore, a multilayer wiring board (laminated board) having a combined structure in which insulating layers and wiring layers are alternately laminated on both sides or one side of an inner wiring board (core board) is often used. Vias are used in connections between layers. In order to cope with miniaturization and high integration of semiconductor elements, there is a tendency for the diameter of signal vias to be further reduced. [0003] That is, in order to avoid the cost increase caused by the increase in the number of layers by increasing the number of columns of bumps (signal bumps) on the signal wiring area of ​​​​the peripheral portion of the semiconductor element, ...

Claims

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to View More

Application Information

Patent Timeline
no application Login to View More
Patent Type & Authority Applications(China)
IPC IPC(8): H05K1/00H05K1/11H05K3/46H01L25/00
CPCH01L2924/15311H01L2224/16H01L2224/83102H01L2224/92125H01L2224/16235H05K1/115H01L23/49822H05K2201/0352H05K1/112H01L2924/15174H01L2924/19106H01L2924/01078H01L23/50H05K2201/096H01L23/49827H01L2924/01079H05K3/4602H01L23/12
Inventor 三浦正幸加藤克人池边宽
Owner KK TOSHIBA