Data line driver including a plurality of cascaded data line driver sections having long sampling period of video signals

A data line and driver technology, applied in the field of data line drivers, can solve the problem that the sampling period is not so long

Inactive Publication Date: 2006-07-12
NEC ELECTRONICS CORP
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

[0005] However, if the D / A converter of the prior art described above is applied to a data line driver including cascaded data line driver segments, the sampling period corresponding to the D / A converter period is not so long

Method used

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  • Data line driver including a plurality of cascaded data line driver sections having long sampling period of video signals
  • Data line driver including a plurality of cascaded data line driver sections having long sampling period of video signals
  • Data line driver including a plurality of cascaded data line driver sections having long sampling period of video signals

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Embodiment Construction

[0027] Before describing the preferred embodiment, reference will be made to figure 1 , 2 , 3, 4, 5 and 6 explain existing LCD devices.

[0028] figure 1 Illustrates the first existing LCD device (JP-3-121415's Figures 1 to 3 ), where reference number 1 denotes an LCD panel having 1024×1028 pixels, each pixel consisting of three color dots, ie, R (red), G (green) and B (blue). Therefore, the LCD panel 1 includes 2,359,296 dots located at 3,072 (=1,024×3) data lines (or signal lines) DL i and 768 scan lines (or gate lines) SL j place. One dot consists of one thin film transistor Q and one liquid crystal cell C. For example, if one dot is represented by 64 gradation voltages, one pixel is represented by 262144 (=64×64×64) colors. Such an LCD panel is called an Extended Graphics Array (XGA). Note that the LCD panel 1 includes 3932166 (=1280×3×1024) dots in Super Extended Graphics Array (SXGA), and includes 5760000 (=1600×3×1200) dots in Extremely Extended Graphics Array ...

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Abstract

In a data line driver for driving N (N=2, 3, . . . ) data lines of a display apparatus including cascaded M (M=2, 3, . . . ) data line driver sections, each of the data line driver sections is constructed by a digital signal receiving and holding section adapted to receive and hold N / M digital video signals in synchronization with a first clock signal, a digital / analog converter adapted to perform a digital / analog conversion upon the N / M digital video signals in synchronization with a second clock signal whose rate is smaller than that of said first clock signal, to generate N / M analog video signals, and an analog video signal receiving and holding section adapted to receive and hold the N / M analog video signals.

Description

technical field [0001] The present invention relates to a data line driver in a flat panel type display device such as a liquid crystal display (LCD) device or an organic electroluminescence (EL) display device. Background technique [0002] In a flat-panel display device including a panel having data lines (or signal lines), scanning lines (or gate lines), and cells each located at an intersection between the data line and the scanning line, a drive for driving A data line driver for the data lines and a scan line driver for driving the scan lines. [0003] Generally, a data line driver has a plurality of decoders or digital / analog (D / A) converters, one for each video signal or one data line. In this case, the more the gradation voltage is, the more the number of connections of the digital video signal is. For example, if 262144 (=64×64×64) gradation voltages are required, the connection number of three digital color video signals is 6, so 26 are required in each D / A conv...

Claims

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Application Information

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IPC IPC(8): G09G3/20G09G3/36G09G3/30
CPCG09G3/3208G09G3/3688G09G2310/027G09G3/20G09G2300/08G09G2310/0297
Inventor 南忠生
Owner NEC ELECTRONICS CORP
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