Electrostatic discharge protective circuit and relevant techniques
A protection circuit and electrostatic discharge technology, applied in emergency protection circuit devices, emergency protection circuit devices, circuits, etc. for limiting overcurrent/overvoltage, can solve unfavorable chip integration, increased chip cost, large layout area, etc. problem, to achieve the effect of economic electrostatic discharge protection mechanism
Active Publication Date: 2006-07-19
VIA TECH INC
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Problems solved by technology
Since the existing electrostatic discharge protection technology must incorporate a capacitor with such a large capacitance value to realize the electrostatic discharge protection circuit, the existing electrostatic discharge protection circuit will occupy a considerable layout area, which is not conducive to the integration of the chip, and also makes the Increased cost of chip design and production
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[0051] Please refer to figure 1 ; figure 1 It is a schematic circuit diagram of a conventional protection circuit 10 . The conventional protection circuit 10 is disposed in the chip 14 to implement an ESD protection mechanism for the chip 14 . The chip 14 is provided with pads VDD and GND, so that the internal circuit 12 in the chip 14 can be electrically connected with external circuits. Wherein, the internal circuit 12 may include core processing circuits (such as various logic gates / calculation / processing / storage circuits) and interface circuits for I / O buffering to realize the main functions of the chip 14 . The pad VDD can be a power pad, and the pad GND can be a ground pad; using these two pads, the internal circuit 12 can be connected to the bias power supply outside the chip, The internal circuit 12 can be biased to the positive voltage of the bias power supply and the ground voltage through the pads VDD and GND, respectively. In order to protect the electrostatic ...
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The invention relates to a static electricity discharge protective circuit and relative technique. When there is static electric discharge accidence between the protected cushion and the earthing cushion of chip, the invention can trigger the strangulation circuit between said two cushions according to the voltage difference between said protected circuit and another power source cushion to process the static electricity discharge protection. In general, there is capacitor effect between the power source cushion and the earthing cushion as the decoupling capacitor which can protect the electricity stability, therefore, when there is the static electricity discharge accidence, the voltage on the power source cushion will not increase quickly with the voltage on the protected cushion and can supply the voltage difference to trigger the strangulation circuit. Then the invention can utilize the capacitor effect on the chip to reduce the area of static electricity discharge protective circuit.
Description
technical field [0001] The invention relates to an electrostatic discharge protection circuit and related technologies, in particular to an electrostatic discharge protection circuit capable of effectively realizing electrostatic discharge protection with a simplified layout and related technologies. Background technique [0002] In order for the chip to receive external bias power and exchange data with other external circuits / chips, conductive pads are provided on the chip. For example, in order to transmit the positive voltage and ground voltage at both ends of the bias power supply, a power pad and a ground pad can be provided on the chip; pad (I / O pad) to receive input signals and / or send out output signals. [0003] However, when a pad of a chip touches an electrostatic power source by mistake (for example, a human body or a processing tool, etc.), a large amount of electrostatic discharge current of the electrostatic power source will flow into the chip through the p...
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IPC IPC(8): H01L27/02H01L23/60H02H9/00
Inventor 陈科远
Owner VIA TECH INC