Methods and apparatus for reducing power dissipation in a multi-processor system

A processor, low power consumption technology, applied in the direction of memory system, multi-programming device, data processing power supply, etc., can solve the problems of increasing repetitive materials and labor costs, not providing enough cooling, and not being completely satisfactory in the final product

Active Publication Date: 2007-01-31
SONY COMPUTER ENTERTAINMENT INC
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

While mechanical thermal management techniques are available, they are not entirely satisfactory due to the duplication of material and labor costs they add to the final product
Mechanical thermal management techniques may also not provide adequate cooling

Method used

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  • Methods and apparatus for reducing power dissipation in a multi-processor system
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  • Methods and apparatus for reducing power dissipation in a multi-processor system

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Embodiment Construction

[0035] To put the various aspects of the invention into context, refer to figure 1 Graphical representation of the static power, dynamic power, and total power curves shown. These power curves are examples of the characteristics of the power produced by a processing unit as a function of the processing load of the processor.

[0036]The static power Ps is equal to the leakage current Il multiplied by the working voltage Vdd of the processing unit, which can be expressed as follows: Ps=Il×Vdd. When the leakage current I1 and the operating voltage Vdd are constant, the static power Ps is also constant as a function of the processing load of the processor, such as figure 1 shown. The dynamic power Pd consumed by the processor can be expressed as follows: Pd=Sf×C×F×Vdd 2 , where Sf is the processing load of the processor, C is the equivalent capacitance of the processor, F is the clock frequency, and Vdd is the operating voltage. Sf represents the number of transistors that a ...

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Abstract

A method and apparatus are provided for: monitoring processor tasks assigned for execution by respective sub-processing units associated with a main processing unit and their associated processor loads; reallocating at least some of the tasks according to their associated processor loads , so that at least one sub-processing unit is not scheduled to perform any task; and commanding the sub-processing unit not scheduled to perform any task enters a low power consumption state.

Description

technical field [0001] The present invention relates to a method and apparatus for reducing power consumption in a multiprocessor system, and more particularly to a method and apparatus for distributing tasks among multiple processors in the system so as to reduce the overall power consumption of the multiple processors. Background technique [0002] Real-time, multimedia applications are becoming increasingly important. These applications require very fast processing speeds, such as multi-gigabits per second of data. Although individual processing units are capable of fast processing speeds, they generally cannot match the processing speed of multiprocessor architectures. Indeed, in a multiprocessor system, multiple processors may operate in parallel (or at least in unison) to achieve a desired processing result. [0003] The types of computers and computing devices that can employ multiprocessing techniques are wide-ranging. In addition to personal computers (PCs) and s...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G06F9/50G06F1/32G06F1/04G06F9/40G06F15/76
CPCG06F1/3287Y02B60/1278Y02B60/144G06F1/3228G06F9/5088Y02B60/162G06F1/329Y02B60/1282Y02D10/00G06F1/32G06F9/50
Inventor 平入孝二
Owner SONY COMPUTER ENTERTAINMENT INC
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