Method and apparatus for operating a string of charge trapping memory cells

Abstract

An array of charge trapping nonvolatile memory cells is arranged in several columns of cells, each arranged in a series, such as a NAND string. Each cell stores no more than a single charge storage state.

Description

technical field [0001] The present invention relates to electronically programmable and erasable nonvolatile memory, and more particularly to charge trapping memory, each charge trapping memory cell having a limited charge storage state. Background technique [0002] The electrically programmable and erasable non-volatile memory technology based on the charge storage structure of the known flash memory has been applied in various modern fields. As the size of integrated circuits shrinks, memory cell structures based on charge-trapping dielectric layers are gradually attracting attention because of their mass production and simple manufacturing processes. The memory cell structure mainly based on the charge trapping dielectric layer includes the structure named PHINES in the industry, and these memory cell structures store data by trapping charges in the charge trapping dielectric layer (such as silicon nitride layer). When negative charges are trapped or positive charges ar...

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Problems solved by technology

[0004] However, the scalability of such PHINES structures is more limited because in charge storage structures, even though multiple charge storage states of a single memory cell are separated, they still interact with each other.

As the size of memory cells shrinks, the interaction between multiple charge storage states in a single memory cell becomes more severe

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