Method of joining a chip on a substrate

Abstract

A method and apparatus for making chip assemblies is disclosed that prevent or reduce the cracking and delamination of ultra low-k dielectrics in the back-end-of-line in Si chips that can occur during the chip assembly process. The method and apparatus apply pressure to the top and bottom surfaces of a substrate during the chip bonding process so that the bending and warping of the assembled modules are reduced. The reduced bending and warping prevent or reduce the cracking and delamination of ultra low-k dielectrics.

Description

CROSS REFERENCE TO RELATED APPLICATION[0001]This application is a divisional of co-pending application Ser. No. 12 / 551,960, filed on Sep. 1, 2009, and for which priority is claimed under 35 U.S.C. §120; the entire contents of which is are hereby incorporated by reference.[0002]The present invention relates to a method and apparatus of making a chip assembly by bonding a chip or other electronic component to a substrate. In particular, the present invention discloses a method and apparatus for assembling a silicon (Si) chip onto an organic substrate while applying mechanical force to the organic substrate to eliminate cracking or delamination in back end of line (BEOL) structure of the Si chip by reducing or preventing warping or bending of the organic substrate.BACKGROUND[0003]Flip chip is the name of a process in which a semiconductor Si chip is flipped over so that the connection pads face towards the substrate. Flip chip technology was first introduced by IBM in the solid logic t...

AI Technical Summary

Benefits of technology

The present patent provides a method and apparatus for assembling chips and substrates without causing bending and warping of the chip assembly. This is particularly useful for organic substrates and low-k or ultralow-k materials used in flip chip assemblies. The method involves using a cover that applies pressure to the substrate and chip during assembly, which prevents bending and warping. The cover can be secured to a carrier using a fastener, which adjusts the pressure applied to the substrate. The apparatus includes a carrier and a cover for securing multiple substrates, which reduces bending and warping of the substrates and chips. The methods and apparatuses can be used for any size of chip and substrate, and can prevent bending and warping of the substrate and chip's internal structure during a solder reflow process.

Problems solved by technology

However, when organic substrates are used for the flip chip assembly, substrate bending and warpage can occur.

The thermally-induced stress / strain in the flip-chip structure often results in a failure of the BEOL structure.

This failure is becoming more common because low k dielectric layers are more fragile than solder joints.

They can impair the electrical and mechanical connections between the flip chip 100 and the substrate 106, and degrade the performance of the flip chip assembly.

This arrangement does not effectively control the thermal-mechanical stresses that occur during chip assembly, particularly during a solder reflow process, and can increase the stress or strain that develops in the chip.

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