Flank wettable semiconductor device

Abstract

A flank wettable semiconductor device is assembled from a lead frame or substrate panel by at least partially undercutting the lead frame or substrate panel with a first cutting tool to expose a flank of the lead frame and applying a coating of tin or tin alloy to the exposed flank prior to singulating the lead frame or substrate panel into individual semiconductor devices. The method includes electrically interconnecting lead frame flanks associated with adjacent semiconductor devices before applying the coating of tin or tin alloy. The lead frame flanks may be electrically interconnected during wire bonding.

Description

BACKGROUND OF THE INVENTION[0001]The present invention relates to semiconductor packaging and more particularly to a semiconductor device having solder wettable side-walls or ‘flanks’ to facilitate inspection of solder joints when the semiconductor device is mounted on a substrate or circuit board using a surface-mount technology (SMT) process.[0002]Due to the manner in which semiconductor devices such as QFN (Quad Flat No lead) packages are singulated with a saw blade the surface of the exposed lead frame flank is flush with the molding compound such that solder does not readily climb-up or “wick” the flank or side-walls of the package meaning that the QFN package is not flank wettable.[0003]FIG. 1 is a flow chart of a conventional assembly process for assembling a QFN device. The conventional process includes a wafer mount and saw step 10 followed by a die bond step 11 in which a die is bonded to a flag of a lead frame, and wire a bond step 12 in which the die is electrically conn...

AI Technical Summary

Benefits of technology

The present invention relates to a semiconductor device and a process for assembling it. The semiconductor device has solder wettable side-walls or "flanks" that allow for inspection of solder joints when the device is mounted on a circuit board using a surface-mount technology (SMT) process. The process includes steps of mounting a lead frame or substrate panel, undercutting the lead frame or substrate panel, and applying a coating of tin or tin alloy to the exposed flanks prior to singulating the lead frame or substrate panel. The semiconductor device is assembled by a method that includes sawing the substrate panel, bonding the die to the lead frame, and wire bonding the die to the lead frame. The invention provides a more efficient and reliable method for inspecting solder joints when mounting semiconductor devices on circuit boards.

Problems solved by technology

Due to the manner in which semiconductor devices such as QFN (Quad Flat No lead) packages are singulated with a saw blade the surface of the exposed lead frame flank is flush with the molding compound such that solder does not readily climb-up or “wick” the flank or side-walls of the package meaning that the QFN package is not flank wettable.

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