11results about "Tubes with electrostatic controls" patented technology

The application discloses a nano-channel transistor structure with an auxiliary anode and a driving method. The structure comprises an insulating substrate, a cathode, a gate and an anode which are made on the substrate, and at least one auxiliary anode is additionally arranged on the side of the anode away from the cathode. The auxiliary anode and the anode can have a height difference. By applying different direct-current voltages, a regulating electric field is formed between the anode and the auxiliary anode, the moving direction and speed of the electrons passing through the anode are changed, and the electrons are collected by the anode or directly collected by the auxiliary anode. The application also provides a corresponding driving method. The gate applies a direct-current bias voltage superimposed with a high-frequency modulation signal, and the anode and the auxiliary anode respectively apply direct-current voltages. The amplified high-frequency signals collected by the anode and / or the auxiliary anode are output through a capacitor, and the multi-output signals can be superimposed after the phase compensation system makes the phases of the multi-output signals consistent. The application effectively improves the utilization efficiency of the cathode emitted electrons and the total output current of the device.

The invention belongs to the technical field of micro-nano electronic device manufacturing, and relates to a large depth-to-width ratio nano vacuum channel laser collaborative manufacturing process which comprises the following steps: depositing a metal enhancement layer and a metal seed layer on a substrate; defining a first layer of electrode pattern through a photoresist process; electroplating and depositing a first metal electrode, and annealing; performing laser glazing on the surface of the electrode; the redundant metal layer is removed through ICP etching; depositing an oxide sacrificial layer on the surface of the device, and then sequentially depositing a metal enhancement layer and a metal seed layer on the surface; carrying out pattern definition on a second layer of electrode through a photoresist process; electroplating and depositing a second metal electrode, and annealing; removing the redundant metal layer through ICP (inductively coupled plasma) etching; removing an overlapping region of the first layer of electrode and the second layer of electrode by using femtosecond laser; and removing the oxide sacrificial layer by wet etching, and releasing to form a nano vacuum channel structure. According to the laser collaborative manufacturing process, the device with the nano vacuum channel with the large depth-to-width ratio is prepared.

Provided are an annular gate plasma transistor and a manufacturing method therefor. The annular gate plasma transistor comprises a source electrode layer (1), a gate electrode layer (2) and a drain electrode layer (3), wherein a first insulating layer (4) is provided between the gate electrode layer (2) and the drain electrode layer (3), and a second insulating layer (5) is provided between the source electrode layer (1) and the gate electrode layer (2); several through holes (20) are formed in a gate electrode of the gate electrode layer (2), the first insulating layer (4) and the second insulating layer (5) are of a hollow structure, and the hollow structure of the first insulating layer (4) is connected to the hollow structure of the second insulating layer (5) by means of the through holes (20), so that a closed chamber is formed between the source electrode layer (1) and the drain electrode layer (3), and a source electrode of the source electrode layer (1), the gate electrode of the gate electrode layer (2) and a drain electrode of the drain electrode layer (3) are exposed in the closed chamber; when the annular gate plasma transistor works, there are carriers in the closed cavity; and the movement trajectories of the carriers are regulated, so as to regulate an on-state current of the annular gate plasma transistor. The present disclosure has a relatively strong gate control capability.

The invention discloses a planar coaxial ring gate nano vacuum channel field emission triode device and method, and relates to the technical field of microelectronic devices and vacuum micro-nano electronics, and the device comprises an insulating substrate, a coaxial ring gate disposed on the insulating substrate, and a medium supporting region disposed around the gate. The emitting electrode and the collecting electrode are arranged on the supporting area and are coaxially arranged; a closed annular nano vacuum gap is formed between the inner edges and the outer edges of the two parts to form a transverse vacuum channel; the coaxial annular grid electrode is located in an annular area below the gap, and the coaxial annular grid electrode and the two electrodes are arranged at intervals in the vertical direction and the plane direction. Through the coaxial ring gates, the electric field modulation uniformity is enhanced, gate interception and local hot spots are suppressed, parasitic capacitance is reduced, and transconductance and GHz-level high-frequency response are improved.

The present invention provides a vacuum device and a preparation method thereof. The method includes: patterning an SOI substrate to form a nano-narrow structure including the minimum radial dimension; wrapping the nano-narrow structure with a gate dielectric layer; performing hydrogen annealing to disconnect the minimum radial dimension, forming a cross-sectional structure that separates the top semiconductor layer into an anode region and a cathode region, and the gate dielectric layer and the nano-narrow structure form a sealed cavity to form a vacuum device. By setting the nano-narrow structure and forming the cross-sectional structure through hydrogen annealing, the present invention obtains a vacuum device with a nano-scale interval between the anode and the cathode to form a larger electric field strength and conduction current; at the same time, a fully surrounding gate vacuum device with stronger control ability is realized by using the nano-cantilever structure; in addition, a cavity under the nano-cantilever structure is only arranged in the top semiconductor layer to further reduce the interval between the anode and the cathode; finally, the nano-cantilever structure is rounded and thinned to further reduce the interval between the anode and the cathode.

The invention discloses a micro-nano vacuum triode and a saturation output method and a preparation method thereof, and relates to the technical field of vacuum micro-nano triodes, and the saturation output method comprises the steps: arranging a crater-shaped micropore grid electrode, enabling the top end of the grid electrode to be higher than the top end of a cathode, weakening the influence of an anode electric field on a cathode surface barrier, and improving the stability of the cathode surface barrier; the saturation output characteristic that the cathode emission current does not change along with the anode voltage is obtained; the emitter with the nanoscale tip curvature radius serves as a cathode, the central axis of the tip of the cathode and the central axis of the crater-shaped micropore grid electrode and the central axis of the micropore anode are located on the same straight line, and the tip curvature radius of the cathode is set to be 0.2-15 nm; and the divergence angle of the emergent electrons at the emitting end of the cathode is within the range that the emergent electrons can pass through the grid micropores and are collected by the anode, so that the current ratio of the anode to the cathode is improved. The problem that the saturation output characteristic of an existing micro-nano vacuum triode is difficult to be compatible with the high anode and cathode current ratio due to the fact that the distance between the cathode and the anode is small is effectively solved.

Embodiments of the present disclosure provide a vacuum transistor, an array substrate and an electronic device, and relate to the technical field of vacuum electronics, and are used for improving the control of the gate on the vacuum tunneling current and improving the on-off ratio of the vacuum transistor. The vacuum transistor comprises a substrate, a first electrode, a gate, a second electrode and a via hole. The first electrode, the gate and the second electrode are sequentially stacked on the substrate along a first direction and a direction gradually away from the substrate, and the first direction is the thickness direction of the substrate. The first electrode and the gate, and the gate and the second electrode are both spaced apart along the first direction. The via hole penetrates the second electrode and the film layer between the second electrode and the first electrode along the first direction, and exposes the side surface of the first electrode away from the substrate. The orthogonal projection of the gate on the substrate and the orthogonal projection of the second electrode on the substrate overlap.

The present invention discloses a vacuum transistor based on a suspended graphene / boron nitride heterojunction and a preparation method and application thereof. The preparation method includes three steps of preparing a metal electrode, etching a channel, and transferring a hexagonal boron nitride-graphene composite structure. The silicon substrate is directly used as a collector, which greatly simplifies the preparation process. The vacuum transistor device structure designed in the present invention is highly innovative, making full use of the bonding force between boron nitride and graphene, suspending the graphene / boron nitride heterojunction as a whole above the channel, effectively reducing the probability of graphene fracture, collapse, curling and wrinkling, overcoming the difficulty of the extremely low success rate of traditional preparation of suspended graphene devices, greatly improving the success rate of preparation of suspended graphene devices, and the prepared vacuum transistor structure is more stable. The use of a new transfer method avoids the contact of graphene with other media such as solutions, effectively solving the problem of existing doping.

A solid-state vacuum triode comprises a substrate, two sides of the top of the substrate are respectively provided with an anode and a cathode, the top of the anode is provided with an anode contact layer in ohmic contact with the anode, the top of the cathode is provided with a cathode contact layer in ohmic contact with the cathode, and a dielectric layer is arranged between the anode contact layer and the cathode contact layer. A groove body is formed in the top surface of the dielectric layer, the groove body is communicated with or not communicated with the vacuum area, and a grid is arranged in the groove body; glass packaging outside a vacuum area of a traditional vacuum triode is replaced with solid materials, the defects that the glass packaging of the traditional vacuum triode is poor in reliability and cannot be miniaturized are overcome, meanwhile, a carrier transport area of a traditional all-solid-state semiconductor triode is vacuumized, the problem that the carrier movement of a solid-state triode is scattered, and the reliability of the solid-state triode is improved is solved. According to the solid-state triode, the unlimited movement of current carriers is combined with the miniaturization of a solid-state structure, so that the conversion power and the working efficiency of a traditional solid-state triode are improved.

The invention discloses a gallium nitride planar micro-nano vacuum triode based on a trapezoidal gate structure. The triode comprises an anode, a cathode, a first grid electrode, a second grid electrode, an insulating layer and a base, the insulating layer is arranged on the upper surface of the base; the anode, the cathode, the first grid electrode and the second grid electrode are arranged on the upper surface of the insulating layer; the anode and the cathode are arranged on the same straight line of the insulating layer, and the first grid electrode and the second grid electrode are symmetrically arranged relative to the straight line; a gap is formed between the first grid electrode and the second grid electrode, and one end of the cathode extends into the gap. The triode improves the shielding of the grid electrode to the anode electric field, and has high grid control capability and low grid electrode leakage current.

The invention discloses a vacuum transistor and a manufacturing method thereof, and an array substrate. The vacuum transistor comprises a substrate; the emitting electrode, the collecting electrode and the annular grid electrode are arranged on different layers and are arranged at intervals; the orthographic projection of the annular grid electrode on the substrate surrounds the orthographic projection of the collector on the substrate, and the annular grid electrode and the collector are arranged at intervals; the orthographic projection of the annular grid electrode on the substrate is located in the orthographic projection of the emitting electrode on the substrate.