Communication device possessing trouble detection function
A communication device and clock signal technology, which is applied in the directions of duplex signal operation, digital transmission system, data exchange network, etc., can solve the problems such as the lack of quantitative measurement of USB communication data, the increase in the cost of communication devices, and the difficulty in detection.
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Embodiment 1
[0035] Referring to FIG. 1 , a communication device 10 according to Embodiment 1 of the present invention is a communication device that implements a physical layer (PHY layer) of USB2.0 Hi-speed (480MBPS).
[0036] Referring to FIG. 1 , a communication device 10 includes a receiver 100 , a transmitter 101 , a clock supply selection circuit 102 , a data comparison circuit 105 , signal switches 106 and 107 , and a vibration measurement circuit 108 .
[0037] The clock supply selection circuit 102 includes: a clock generation circuit 103 , a clock modulation circuit 104 and a clock switch 116 .
[0038] Clock generation circuit 103 multiplies external clock 142 from external oscillator 20 to generate internal clock signal CLKI and internal clock group 144 . The internal clock signal CLKI and the internal clock group 144 are high-speed clocks with a frequency of 480 MHz. For example, if the frequency of the external clock 142 is 12 MHz, the clock generation circuit 103 multiplie...
Embodiment 2
[0122] Referring to FIG. 11 , the communication device 10# of the second embodiment of the present invention is different from the communication device 10 of the first embodiment shown in FIG. 1 in the configuration of the clock supply selection circuit 102 . That is, in the communication device 10# of the second embodiment, the reference internal clock signal CLKI (480MHz) is directly supplied to the transmitter 101 as the transmission clock 146#, and the clock switch 116 is provided corresponding to the receiver 100 .
[0123] The clock switch 116 selects one of the internal clock signal CLKI used as the transmission clock 146# and the modulated clock signal 145 output by the clock modulation circuit 104, and supplies it to the receiver 100 as the reception clock 143#. The configuration of other parts of the communication device 10# is the same as that of the communication device 10 of the first embodiment, and detailed description thereof will not be repeated.
[0124] With...
Embodiment 3
[0128] In Embodiment 3, a test mode in which the half-duplex communication device 10 or 10# described in Embodiment 1 or 2 operates in a full-duplex mode and performs a high-speed fault detection test is described.
[0129] In the test mode of embodiment 3, in the communication device 10 and 10# shown in Fig. 1 and Fig. 11 respectively, signal switch 106 and 107 form signal between test communication node 147 and 148 and receiving node 134 and 135 path. That is, within each communication device 10, 10#, the signal path between its own communication nodes 132, 133 and receiving nodes 134, 135 is blocked.
[0130] FIG. 12 shows signal paths between communication devices in the test mode of the third embodiment.
[0131]Referring to FIG. 12 , in the test mode of the third embodiment, signals are transmitted and received between two communication devices 10A and 10B. Communication device 10A receives transmission data 201 as transmission data 130-A by transmitter 101, converts i...
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