Driving circuit for DC/DC converter voltage and level transferring method

Abstract

The driving circuit consists of an input end used to receive PWM signal, a first output end connecting to main switch and used to output a low side driving signal, a second output end connecting to the active switch and used to output a high end driving signal, a first branch composed of a voltage level transition capacitor and first buffer that are connected between the input end and second output end, and a second branch composed of a delay circuit and second buffer that are connected between the input end and the first output end. When the PWM signal is raised from a low potential to a high potential, the voltage level transition capacitor transfers the PWM signal to first buffer in order to shut down the active switch, and then, after a time delay, triggers the second buffer in order to turn on main switch.

Description

technical field [0001] The invention relates to a power supply system, in particular to a driving circuit for a DC / DC converter and a voltage level transfer method thereof. Background technique [0002] A high-side and low-side converter has been widely used to drive the switch bridge of bridge converters, such as active clamp feed-forward converters , half-bridge converters, and full-bridge converters. figure 1 is a circuit diagram of a conventional active-clamp feed-forward converter with a driver IC, in which the low-side switch S1 (main switch) is configured on the primary side of a transformer T, and an active-clamp branch is connected in parallel On the primary side coil of the transformer T, the active clamping branch is composed of a high-side switch (active switch) S2 and a clamping capacitor C11 connected in series, wherein the low-side switch S1 and the high-side switch S2 complement each other to form a A switch bridge arm, and a high-side and low-side driver I...

AI Technical Summary

Problems solved by technology

[0003] Currently, the high-side driver and the low-side driver are usually integrated on one chip, figure 2 Shown is a relatively common design method. In this known drive IC, two input signals Hin and Lin are required. The input signal Lin is used to trigger a PWM signal of the low-end drive circuit 3, and the other input signal Hin is an inverse signal of the PWM signal, which is used to trigger the high-side drive circuit 2. Through the control of the inverse signal of the PWM signal, two high voltage rate switches M1 and M2 can be used to achieve the voltage level shift of the high-side driver 1, However, the use of high voltage rate switches M1 and M2 has several disadvantages; firstly, the switching losses of these switches can be very large especially at high switching frequencies, and also, the switches M1 and M2 are packaged in the driver IC, which increases the The complexity of the process, and thirdly, these high voltage rate switches will increase the cost of the driver. In addition, in order to facilitate the smooth driving of the high-side switch S2 and the low-side switch S1, it is necessary to use a dead-time setting circuit to generate There are two complementary signals with effective static time. It is well known that the ability to supply current (source current) and sink current (sink current) is an important factor to measure a driving circuit. In most driving ICs, the supply current and The ability to sink current is limited to slow down the turn-on and turn-off of switching components in a large power converter and reduce the efficiency of the converter, therefore, it is necessary to add an additional snubber circuit

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