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Semiconductor element

A semiconductor and device technology, applied in the field of semiconductor devices, can solve problems such as cracks, achieve the effects of reducing deformation, reducing the linear expansion coefficient, and reducing warpage

Active Publication Date: 2008-07-02
MITSUBISHI ELECTRIC CORP
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0002] In the existing semiconductor devices, since the light-emitting substrate (insulating substrate) such as aluminum nitride (AlN) is fixed on the substrate through the metal layer and solder, it has the disadvantage of cracks on the junction surface due to the difference in thermal expansion of each material.

Method used

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  • Semiconductor element
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Examples

Experimental program
Comparison scheme
Effect test

Embodiment 1

[0035] figure 1 is a cross-sectional view showing the structure of the semiconductor device of this embodiment. The insulating substrate 2 is bonded to the base plate 1 by a molten metal method. The bottom plate 1 is formed of Al or Al alloy with a thickness of 3-5 mmt. In addition, the insulating substrate 2 is made of aluminum nitride, aluminum oxide (Al 2 o 3 ) or silicon nitride (Si 3 N 4 ) etc. are formed.

[0036] The circuit patterns 31, 32 are bonded to the insulating substrate 2 by a molten metal method. The semiconductor element 4 is bonded to the circuit pattern 31 via the solder layer 5 . Further, an upper electrode (not shown) of the semiconductor element 4 is electrically connected to the electrode pattern 32 by the Al wire 6 . The semiconductor element 4 is, for example, an IGBT (Insulated Gate Bipolar Transistor).

[0037] Here, the bottom plate 1, the insulating substrate 2 and the circuit patterns 31, 32 are integrated into one body by a molten metal...

Embodiment 2

[0073] In the semiconductor device of the present embodiment, the bent flange portion 13 b is also formed on the inner periphery of the opening portion 13 a of the stiffener 13 . The other configurations are the same as in the first embodiment, and the same symbols are assigned to the same configurations as in the first embodiment, and repeated explanations are omitted.

[0074] Figure 13 It is a plan view showing the structure of the reinforcing plate 13 of this embodiment. in addition, Figure 14 show Figure 13 The D-D line profile. Additionally, Figure 15 shows the Figure 13 E-E line profile. Such as Figure 13-1 5, a bent flange portion 13b is formed on the inner periphery of the opening portion 13a. The bent flange portion 13b can be easily formed by, for example, a press method or the like.

[0075] By providing the bent flange portion 13b on the inner periphery of the opening portion 13a, the bending rigidity can be further improved. As a result, sufficient ...

Embodiment 3

[0080] Figure 19 is a cross-sectional view showing the structure of the semiconductor device of this embodiment. Such as Figure 19As shown, the semiconductor device of this embodiment corresponds to the semiconductor device without the stiffener 13 formed on the base plate 1 . The other configurations are the same as in Embodiment 1, and the same symbols are assigned to the same configurations, and repeated explanations thereof will be omitted.

[0081] In this embodiment, since it is comprised as mentioned above, the warpage of the base plate 1 can be improved by the sealing resin 12 filled inside the package case 7. As shown in FIG. Therefore, in the case where the size of the integrated chassis 1 is small and thus the degree of warpage is small, the warpage can be improved with a simple structure compared with Example 1.

[0082] In addition, by filling the sealing resin 12 in the package case 7, the strain of the solder layer 5 under the semiconductor element 4 can be...

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PUM

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Abstract

PROBLEM TO BE SOLVED: To provide a technology for reducing warp or deformation of a base board occurring in heating process at the time of assembling a semiconductor device.SOLUTION: A reinforcing board 13 is formed in a base board 1. The reinforcing board 13 employs such a material as Cu, Cu alloy, Fe, Fe alloy, or the like, having a linear expansion coefficient smaller than that of the material (e.g. Al) at other part of the base board 1. Since the reinforcing board 13 having a smaller linear expansion coefficient is formed in the base board 1, apparent linear expansion coefficient of the base board 1 is decreased. Consequently, difference in linear expansion coefficient is decreased between the base board 1 and an insulating substrate 2, and warp of the base board 1 resulting from difference in linear expansion coefficient between the base board 1 and the insulating substrate 2 can be reduced in heating process.

Description

technical field [0001] The invention relates to a semiconductor device, in particular to a technology for reducing the warping of the bottom plate generated when the semiconductor device is heated and assembled. Background technique [0002] In the existing semiconductor devices, since the light-emitting substrate (insulating substrate) such as aluminum nitride (AlN) is fixed on the substrate through the metal layer and solder, it has the disadvantage of cracks on the junction surface due to the difference in thermal expansion of each material. . [0003] Therefore, in Patent Document 1, it is disclosed that after melting aluminum (Al) or an aluminum alloy in a vacuum or an inert gas to obtain a melt, the melt is brought into contact with an insulating substrate in a mold in a vacuum or an inert gas. By keeping the molten body in direct contact with the insulating substrate without intervening the oxide film of the metal surface at the interface between them by keeping it c...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H01L23/14
CPCH01L2224/45124H01L2224/73265H01L2224/48227H01L2224/32225H01L24/73H01L2924/1305H01L2924/13055H01L2924/00012H01L2924/00
Inventor 西堀弘筱原利彰吉田健治
Owner MITSUBISHI ELECTRIC CORP