High-frequency integrated circuit packaging construction for improving connectivity of embedded projection and manufacturing method thereof
A technology of an integrated circuit and a manufacturing method, applied in the field of chip-on-board packaging structure
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no. 1 Embodiment
[0131] see image 3 Shown is a schematic cross-sectional view of a high-frequency integrated circuit package structure according to the first specific embodiment of the present invention. In the first embodiment of the present invention, the high-frequency integrated circuit package structure 200 mainly includes a substrate 210 formed with a solder layer 220 , a bumped chip 230 and a die-bonding material 240 .
[0132] The substrate 210 has a first surface 211 , a second surface 212 and a plurality of bump receiving holes 213 . In this embodiment, the second surface 212 of the substrate 210 is formed with a circuit layer 216, which includes a plurality of inner pads 214 and a plurality of outer pads 215, wherein the positions of the inner pads 214 are located at The corresponding bump accommodating hole 213 is toward the bottom of the second surface 212 . In addition, a soft solder layer 220 is formed on the surface of the internal contact pads 214, such as tin, tin-lead, le...
no. 3 Embodiment
[0146] see Figure 9 Shown is a schematic cross-sectional view of a high-frequency integrated circuit package structure for improving embedded bump bonding according to a third embodiment of the present invention. The high-frequency integrated circuit package structure 400 of the third embodiment of the present invention mainly includes a substrate 410 , a chip 420 , an encapsulant 430 and a plurality of external terminals 440 .
[0147] The substrate 410 has a first surface 411 , a second surface 412 and a plurality of bump accommodating holes 413 , and the bump accommodating holes 413 pass through the first surface 411 and the second surface 412 . Each bump receiving hole 413 is provided with an inner pad 414 at one end of the second surface 412, and each inner pad 414 is formed with a network structure, so that these inner pads 414 become more elastic and extensible. properties, can improve the bonding ability of bumps. For example, if Figure 10 Shown is a schematic dia...
no. 4 Embodiment
[0155] see Figure 11 Shown is a schematic cross-sectional view of another high-frequency integrated circuit package structure for improving embedded bump bonding according to the fourth embodiment of the present invention. Another high-frequency integrated circuit package structure 500 disclosed in the fourth embodiment of the present invention mainly includes a substrate 510 , a chip 520 , an encapsulant 530 and a plurality of external terminals 540 .
[0156] The substrate 510 has a first surface 511 , a second surface 512 and a plurality of bump receiving holes 513 , and the bump receiving holes 513 pass through the first surface 511 and the second surface 512 . Each bump accommodating hole 513 is provided with an inner pad 514 at one end of the second surface 512, and each inner pad 514 is formed with a network structure 514A (such as Figure 12A shown). These network structures can be in the shape of center convergent network, square grid and concentric circle network....
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