Non-contact type IC card preventing data from error restoring while AM wave-carrier demodulation
A non-contact, demodulation circuit technology, applied to record carriers used in machines, near-field transmission systems using transceivers, instruments, etc., can solve erroneous phase inversion, data 1 data 0 misjudgment, voltage data 0 data 1 Misjudgment, etc.
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no. 1 example
[0061] Figure 5 is a circuit diagram of an example configuration of a demodulation circuit incorporated in the modulation / demodulation section 41 of the non-contact IC card 10 of the first embodiment of the present invention. This demodulation circuit and image 3 The one shown in is different in that a transistor 107 is provided for shorting the two inputs (nodes B and C) of the comparator 108 at predetermined times to prevent the output of the comparator 108 from inverting. Structural elements other than transistor 107, that is, resistors 101 and 102, capacitors 103 and 104, resistors 105 and 106, and comparator 108 are all and image 3 are the same as those shown in , and therefore will not be described in detail here.
[0062] More specifically, the nodes B and C are connected to the source and drain of the transistor 107 respectively, and the demodulation delay signal is input to the gate of the transistor 107 . In the case of this structure, the nodes B and C are sho...
no. 2 example
[0069] In the first embodiment, the demodulation suspend signal is applied to the gate of transistor 107 to short-circuit node B and node C, thereby avoiding erroneous data recovery due to noise in the power supply voltage waveform. On the other hand, in the second embodiment, when the demodulation delay signal is turned on, the time constant of the differential circuit constituted by the capacitor 104 and the resistor 105 is increased, and the voltage of the node B is prevented from exceeding even if a noise appears in the power supply voltage waveform. Comparator 108 threshold.
[0070] Figure 7 is a circuit diagram of an example of a demodulation circuit provided in the modulation / demodulation section 41 of the non-contact IC card 10 of the second embodiment of the present invention. As shown in the figure, capacitor 103 is connected in parallel with a new capacitor 109, transistor 107 is connected to capacitor 109, and the demodulation delay signal is input to the gate o...
no. 3 example
[0073] In the third embodiment, when the demodulation delay signal is turned on, the hysteresis width of the comparator 108 is increased (that is, the upper and lower thresholds of the comparator 108 are increased and decreased by a certain value) so as to avoid data loss due to clutter in the power supply voltage waveform. Error recovery.
[0074] Figure 8 is a circuit diagram of an example structure of the comparator 108 in the demodulation circuit of this embodiment. The comparator 108 includes P-channel MOS transistors (hereinafter referred to as "PchMOS transistors") 301 to 305 and N-channel MOS transistors (hereinafter referred to as "NchMOS transistors") 306 to 315, and the power supply voltage (V dd ) are input to the sources of the PchMOS transistors 301, 304 and 305.
[0075] In addition, a bias voltage for current control is applied to the gate of the PchMOS transistor 301 . The level of this bias voltage is not particularly limited, but depends on V dd and V ...
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