Virtual FIFO internal storage realizing method and controlling device thereof

Abstract

The invention discloses a method for realizing a virtual first-in-first-out (FIFO) memory, comprising the following steps: A. The bus of a hardware module provides a read / write request and a read / write address, and according to the read / write request and read / write The write address generates a virtual FIFO pointer; B. Perform read / write operations on the on-chip memory according to the virtual FIFO pointer. The invention also discloses a virtual FIFO memory control device. The solution of the invention can realize the reading and writing operation of the on-chip memory through the virtual FIFO memory, thereby greatly saving the storage space of the on-chip memory.

Description

Technical field [0001] The invention relates to the technical field of memory control, in particular to a method and a control device for implementing virtual first-in first-out memory. Background technique [0002] With the development of System on Chip (SOC) chip technology, more and more modules are integrated on a chip. These modules include central processing unit (CPU), digital signal processor (DSP), Dedicated hardware circuits and so on, so the demand for memory is increasing. According to the location of memory distribution, it can be divided into on-chip memory and off-chip memory. Since the on-chip memory is integrated on the chip, in order to control costs, the capacity of the on-chip memory is generally not large. Therefore, how to efficiently use on-chip memory has become an increasingly important issue. [0003] In the prior art, First-In First-Out (FIFO) memory is often used as on-chip memory, and FIFO memory is used as a dedicated memory for one or more hardware ...

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Problems solved by technology

[0003] In the prior art, first-in-first-out (First-In First-Out, FIFO) memory is often used as on-chip memory, and FIFO memory is used as a dedicated memory for one or more hardware modules, and cannot be shared with other modules

Therefore, for the FIFO memory specially configured for some hardware, when the hardware does not work or the capacity used is less than the configured FIFO memory capacity, the unused FIFO memory capacity is wasted, which leads to FIFO memory capacity in the prior art. Inefficient use of on-chip memory

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