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Method and device for demapping a tributary recovering lower order synchronism

A technique of demapping and branching, applied in the field of data transmission

Inactive Publication Date: 2012-10-31
PROVENANCE ASSET GRP LLC
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

In other words, the demapper must restore low-order synchronization gracefully

Method used

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  • Method and device for demapping a tributary recovering lower order synchronism
  • Method and device for demapping a tributary recovering lower order synchronism
  • Method and device for demapping a tributary recovering lower order synchronism

Examples

Experimental program
Comparison scheme
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Embodiment Construction

[0029] figure 1 A demapper according to MI2005A001286 is schematically shown, adapted to demap branches from a high order frame HF to a low order frame LF.

[0030] The demapper DEMAP contains an elastic memory M, such as RAM, for storing D words, each word containing W bits, where a bit (usually either first or last) is the alignment bit mentioned above. Therefore, the total storage is D x W, with D being the number of rows and W being the number of columns.

[0031] At the input of the memory M, a tributary extraction module TE is provided for extracting tributaries from high-order frames; said module TE is adapted to remove redundant bits from high-order frames HF. The module TE then writes the tributary words into the memory M.

[0032] An aligner A is further provided at the input of the memory M, which is cascaded with the module TE. The aligner A is adapted to look up the alignment word and to write an alignment bit into the memory M for each stored row, ie for each ...

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PUM

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Abstract

It is disclosed a method of demapping a tributary from a first frame into a second frame, the first frame comprising a plurality of tributary words and a synchronization word, the method comprising: providing a first and a second counters; increasing the first counter by a first value at each clock cycle of the second frame; and performing reading operations according to the second counter. It further comprises: generating synchronization information according to the synchronization word; according to the synchronization information, performing a change of state between a first state and a second state, wherein, in the first state, the second counter is synchronized to the first counter at each clock cycle of the second frame, and in the second state, the second counter is synchronized tothe first counter at a predetermined instant of the second frame and the second counter is increased by a second value at each clock cycle of the second frame wherein the reading operation is performed.

Description

technical field [0001] The present invention generally relates to the field of data transmission. More particularly, the present invention relates to a method and apparatus for recovering low-order synchronization, demapping tributaries from high-order synchronization frames to low-order synchronization frames. Furthermore, the invention relates to a network node comprising such a device. Background technique [0002] In a synchronous transmission network, data is transmitted as tributary signals (or simply "tributaries") by sync frames, which are synchronized by a network reference clock. [0003] Synchronous frames are usually arranged in a synchronous series. Frames of different layers of the isochronous series can be transmitted in tributaries. [0004] The asynchronous or quasi-synchronous legs transported by the synchronous frames of a certain layer are usually demapped (ie extracted) from the frame before reception. The demapping described above is usually perform...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H04L7/04H04L1/00H04J3/06H04J3/16
CPCH04J3/1611H04J3/07
Inventor L·G·拉泽蒂S·里纳尔迪P·索尔杰
Owner PROVENANCE ASSET GRP LLC