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Reading non-volatile storage with efficient control of non-selected word lines

A non-volatile storage and non-volatile technology, applied in the direction of read-only memory, digital memory information, static memory, etc., can solve the problem of not being able to absorb current effectively

Inactive Publication Date: 2009-02-04
SANDISK TECH LLC
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

Some charge pumps and other circuits commonly found on flash memory devices today cannot sink current efficiently to bring the voltage down to any specific voltage other than the standby voltage
Need to add new circuitry for more complex sequence and voltage sense control, which itself will require additional space on the device

Method used

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  • Reading non-volatile storage with efficient control of non-selected word lines
  • Reading non-volatile storage with efficient control of non-selected word lines
  • Reading non-volatile storage with efficient control of non-selected word lines

Examples

Experimental program
Comparison scheme
Effect test

Embodiment Construction

[0029] One example of a non-volatile memory system suitable for implementing the present invention uses a "NAND" flash memory structure that includes multiple transistors arranged in series between two select gates. The series connection of transistors and the select gates is called a "NAND" string. figure 1 is a top view showing a "and not" string. figure 2 is the equivalent circuit of the "AND" string. figure 1 and 2The NAND string depicted in includes four transistors 100 , 102 , 104 , and 106 in series and sandwiched between a first select gate 120 and a second select gate 122 . Select gate 120 connects the NAND string to bit line contact 126 . Select gate 122 connects the NAND string to source line contact 128 . Select gate 120 is controlled by applying an appropriate voltage to control gate 120CG. Select gate 122 is controlled by applying an appropriate voltage to control gate 122CG. Each of transistors 100, 102, 104, and 106 has a control gate and a floating gate...

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PUM

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Abstract

A process for reading data (including verifying during programming) from a selected non-volatile storage elements of a group (e.g.,' NAND' string) of non-volatile storage elements includes maintaining an intermediate voltage as a control gate voltage for an unselected non-volatile storage element and subsequently changing the control gate voltage for the unselected non-volatile storage element from the intermediate voltage to a read enable voltage. The control gate voltage for the selected non-volatile storage element is raised from a standby voltage (which is different from the intermediate voltage) to a read compare voltage. While the control gate for the selected non-volatile storage element is at the read compare voltage and the control gate for the unselected non-volatile storage element is at the read enable voltage, the state of the selected non-volatile storage element is sensed to determine information about the data stored in the selected non-volatile storage element.

Description

technical field [0001] The techniques described herein relate to non-volatile memory. Background technique [0002] The use of semiconductor memory in various electronic devices has become more popular. For example, non-volatile semiconductor memory is used in cellular telephones, digital cameras, personal digital assistants, mobile computing devices, non-mobile computing devices, and other devices. The most popular non-volatile semiconductor memories include Electrically Erasable Programmable Read Only Memory (EEPROM) and flash memory. [0003] Both EEPROM and flash memory utilize floating gates that are positioned over and insulated from a channel region in a semiconductor substrate. The floating gate is located between the source region and the drain region. A control gate is provided on and insulated from the floating gate. The threshold voltage of a transistor is controlled by the amount of charge remaining on the floating gate. That is, the minimum amount of volta...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G11C16/26
CPCG11C16/3481G11C16/0483G11C16/3468G11C8/08G11C16/08
Inventor 龟井辉彦
Owner SANDISK TECH LLC
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