Method for constructing network on three-dimensional chip

Abstract

The invention provides a method for building a network on a three-dimensional wafer, the network structure thereof is a three-dimensional network which is composed of a De Bruiin figure network in the horizontal direction and a cylindrical structure in the vertical direction, nodes in the network are almost (A nodes) which are composed by two types of functional modules of processing units and routing units, and the processing units and the routing units (Router) are connected through data unidirectional lines, and the others are only exchanging units (B nodes). The method fully exerts the advantages of the De Bruiin figure, firstly designing the simplest circulating path algorithm, secondly, designing a short shifting route algorithm and the shortest shifting route algorithm based on the simplest circulating path algorithm, thirdly, utilizing the designed route algorithm to reduce the average hops of data transmission and to reduce the network delay and the throughout, fourthly utilizing the fault-tolerant characteristic of the De Bruiin figure to design the data transmission method with the function for preventing the blocking, thereby improving the reliability of the data transmission, finally, directly connecting the processing units with the routing units in the nodes, thereby reducing the data transmission links.

Description

technical field [0001] The invention belongs to the application technical field of integrated circuit chips, in particular to the topological structure of the three-dimensional on-chip network, the network node structure and the routing algorithm. Background technique [0002] In recent years, with the development of technology, a new form of packaging has emerged—three-dimensional packaging, that is, multiple bare chips are stacked vertically and packaged into a chip. The chip obtained by three-dimensional packaging is called a three-dimensional IC. Compared with the traditional two-dimensional IC, it has many advantages such as large capacity and high density. [0003] Because the architecture of the 3D NoC (Network on Chip) has a great influence on the network throughput, reliability, task mapping of the application layer, and the area and power consumption of the chip, the architecture of the 3D NoC is the most basic solution for realizing the 3D NoC. , the most importa...

AI Technical Summary

Problems solved by technology

Because the Torus structure is only a simple extension of the Mesh structure, it still has the characteristics of the Mesh structure. The network node structure and routing algorithm also inherit and simply improve the Mesh structure algorithm, so it also has a larger network delay and a lower throughput. low disadvantage

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