Polysilicon gate, semiconductor device and formation method thereof

Abstract

A polysilicon gate formation method comprises the steps as follows: forming a sacrifice layer on a substrate; forming a groove in the sacrifice layer and exposing the substrate by the groove; forming a stratum layer covering the sacrifice layer as well as the side wall and the bottom wall of the groove; forming a polysilicon layer covering the stratum layer and filling the groove; executing planarization operation and removing the stratum layer covering the sacrifice layer; and removing the sacrifice layer. The invention also provides a polysilicon gate, so that the root defects of the formed polysilicon gate can be improved. The invention further provides a semiconductor device formation method and a semiconductor device, thus having fewer polysilicon gate root defects after being formed.

Description

technical field [0001] The invention relates to the technical field of semiconductor manufacturing, in particular to a polysilicon gate, a semiconductor device and a forming method thereof. Background technique [0002] Since the gate usually has the smallest physical dimension in the semiconductor manufacturing process, and the width of the gate is usually the most critical critical dimension on the wafer, the fabrication of the gate is the most critical step in the process of semiconductor device manufacturing . [0003] In the existing process, the steps of forming a polysilicon gate usually include: figure 1 As shown, a gate dielectric layer 20 is formed on the substrate 10; as figure 2 As shown, a polysilicon layer 30 is formed on the gate dielectric layer 20; image 3 As shown, a patterned resist layer 40 is formed on the polysilicon layer 30; as Figure 4 As shown, using the patterned resist layer 40 as a mask, the polysilicon layer 30 is etched to form a polysil...

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Problems solved by technology

However, actual production finds that, as Figure 5 As shown, the IEP or OES test results show that when the etching of the polysilicon gate is completed, there are often gate layer material residues (footing) at the root of the polysilicon gate, referred to as root defects 34, that is, the structure of the gate has occurred. Variety

[0006] However, when the gate dielectric layer is only an oxide layer, the application of the above method basically cannot reduce the occurrence of the root defects

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