Polysilicon gate, semiconductor device and formation method thereof

A polysilicon gate and device technology, used in semiconductor devices, semiconductor/solid-state device manufacturing, electrical components, etc., can solve the problems of inability to reduce root defects and gate structure changes, and achieve the effect of improving root defects and reducing root defects.

Active Publication Date: 2009-12-02
SEMICONDUCTOR MANUFACTURING INTERNATIONAL (BEIJING) CORP
View PDF1 Cites 2 Cited by
  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

However, actual production finds that, as Figure 5 As shown, the IEP or OES test results show that when the etching of the polysilicon gate is completed, there are often gate layer material residues (footing) at the root of the polysilicon gate, refe

Method used

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
View more

Image

Smart Image Click on the blue labels to locate them in the text.
Viewing Examples
Smart Image
  • Polysilicon gate, semiconductor device and formation method thereof
  • Polysilicon gate, semiconductor device and formation method thereof
  • Polysilicon gate, semiconductor device and formation method thereof

Examples

Experimental program
Comparison scheme
Effect test

Embodiment Construction

[0034] Although the invention will be described in more detail below with reference to the accompanying drawings, in which preferred embodiments of the invention are shown, it should be understood that those skilled in the art can modify the invention described herein and still achieve the advantageous effects of the invention. Therefore, the following description should be understood as a broad instruction for those skilled in the art, rather than as a limitation of the present invention.

[0035] In the interest of clarity, not all features of an actual implementation are described. In the following description, well-known functions and constructions are not described in detail since they would obscure the invention with unnecessary detail. It should be appreciated that in the development of any actual embodiment, numerous implementation details must be worked out to achieve the developer's specific goals, such as changing from one embodiment to another in accordance with sy...

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to view more

PUM

No PUM Login to view more

Abstract

A polysilicon gate formation method comprises the steps as follows: forming a sacrifice layer on a substrate; forming a groove in the sacrifice layer and exposing the substrate by the groove; forming a stratum layer covering the sacrifice layer as well as the side wall and the bottom wall of the groove; forming a polysilicon layer covering the stratum layer and filling the groove; executing planarization operation and removing the stratum layer covering the sacrifice layer; and removing the sacrifice layer. The invention also provides a polysilicon gate, so that the root defects of the formed polysilicon gate can be improved. The invention further provides a semiconductor device formation method and a semiconductor device, thus having fewer polysilicon gate root defects after being formed.

Description

technical field [0001] The invention relates to the technical field of semiconductor manufacturing, in particular to a polysilicon gate, a semiconductor device and a forming method thereof. Background technique [0002] Since the gate usually has the smallest physical dimension in the semiconductor manufacturing process, and the width of the gate is usually the most critical critical dimension on the wafer, the fabrication of the gate is the most critical step in the process of semiconductor device manufacturing . [0003] In the existing process, the steps of forming a polysilicon gate usually include: figure 1 As shown, a gate dielectric layer 20 is formed on the substrate 10; as figure 2 As shown, a polysilicon layer 30 is formed on the gate dielectric layer 20; image 3 As shown, a patterned resist layer 40 is formed on the polysilicon layer 30; as Figure 4 As shown, using the patterned resist layer 40 as a mask, the polysilicon layer 30 is etched to form a polysil...

Claims

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to view more

Application Information

Patent Timeline
no application Login to view more
IPC IPC(8): H01L21/28H01L21/336H01L29/78H01L29/423
Inventor 张海洋杜珊珊马擎天
Owner SEMICONDUCTOR MANUFACTURING INTERNATIONAL (BEIJING) CORP
Who we serve
  • R&D Engineer
  • R&D Manager
  • IP Professional
Why Eureka
  • Industry Leading Data Capabilities
  • Powerful AI technology
  • Patent DNA Extraction
Social media
Try Eureka
PatSnap group products