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Clock synchronization method and system

A clock synchronization and clock technology, applied in time division multiplexing systems, transmission systems, electrical components, etc., can solve the problems of increased clock synchronization deviation, master-slave clocks cannot meet the synchronization accuracy requirements between master-slave clocks, etc., to achieve The effect of reducing synchronization deviation

Inactive Publication Date: 2009-12-16
SUPCON GRP +1
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

[0003] However, in an industrial control system, after the master-slave devices achieve clock synchronization, the clock synchronization deviation between the master-slave devices increases due to the deviation of the crystal oscillator frequency between the master-slave devices, which may cause the clock synchronization deviation between the master-slave devices, that is, the master The synchronization deviation between the slave clocks cannot meet the synchronization accuracy requirements between the master and slave clocks

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  • Clock synchronization method and system
  • Clock synchronization method and system
  • Clock synchronization method and system

Examples

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no. 1 example

[0090] Figure 4 The block diagram of the first embodiment of the first acquisition unit provided by the embodiment of the present invention, the first acquisition unit includes:

[0091] The acquisition subunit 401 is configured to acquire the synchronization deviation between the master and slave clocks sent by the slave clock.

[0092] In the embodiment of the present invention, after the master clock realizes clock synchronization, there are two methods for obtaining the synchronization deviation between the master and slave clocks sent by the slave clock, specifically:

[0093] 1. The master clock sends a request message to the slave clock, and the request message includes requesting the slave clock to send a synchronization deviation message between the master and slave clocks.

[0094] After receiving the request message, the slave clock sends the synchronization deviation between the master and slave clocks to the master clock;

[0095] The master clock receives the ...

no. 2 example

[0099] Figure 5 The block diagram of the second embodiment of the first acquisition unit provided by the embodiment of the present invention includes:

[0100] The acquisition subunit 501 is configured to receive the synchronization deviation between the master and slave clocks sent by the slave clock.

[0101] The acquisition subunit 501 has the same function as the acquisition subunit 401, and details are not repeated here.

[0102]The average value calculation subunit 502 is configured to calculate the average value of the synchronization deviation between the master and slave clocks, and use the average value of the synchronization deviation between the master and slave devices as a reference value of the synchronization deviation between the master and slave clocks.

no. 3 example

[0103] Image 6 The block diagram of the third embodiment of the first acquisition unit provided by the embodiment of the present invention includes:

[0104] The acquisition subunit 601 is configured to receive the synchronization deviation between the master and slave clocks sent by the slave clock.

[0105] The acquisition subunit 601 has the same function as the acquisition subunit 401, and details are not repeated here.

[0106] The weight coefficient obtaining subunit 602 is configured to obtain the weight coefficient of the slave clock.

[0107] The synchronization deviation reference value calculation subunit 603 is configured to calculate the synchronization deviation reference value between the master and slave clocks according to the weight coefficient of the slave clock.

[0108] Figure 7 The embodiment block diagram of the weight coefficient acquisition subunit provided for the embodiment of the present invention, the weight coefficient acquisition subunit inc...

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Abstract

The embodiment of the invention provides a clock synchronization method and a system. The clock synchronization method comprises the following steps: acquiring synchronism deviation between a master clock and a slave clock sent from a clock, and acquiring a synchronism deviation reference value between the master clock and the slave clock according to the synchronism deviation between the master clock and the slave clock; acquiring a synchronism deviation reference value between the master clock and the slave clock in unit time according to the synchronism deviation reference value between the master clock and the slave clock; acquiring the maximum synchronism deviation allowed between the master clock and the slave clock according to the synchronism accuracy requirement between the master clock and the slave clock; calculating the minimum value of synchronization frequency between the master clock and the slave clock according to the synchronism deviation reference value between the master clock and the slave clock in the unit time and the maximum synchronism deviation allowed between the master clock and the slave clock; and taking a value not less than the minimum value of the synchronization frequency between the master clock and the slave clock as a synchronization frequency value of the master clock, and carrying out clock synchronization. The embodiment of the invention reduce the synchronism deviation between the master clock and the slave clock and make the synchronism deviation between the master clock and the slave clock meet the accuracy requirement between the master clock and the slave clock of the system.

Description

technical field [0001] The invention relates to the technical field of industrial communication, in particular to a clock synchronization method and system. Background technique [0002] As networks are applied to industrial control systems, clock synchronization technology plays an increasingly important role in industrial control systems, and different industrial applications have different requirements for clock synchronization accuracy between devices. At present, the most commonly used clock synchronization method in industrial control systems is: under the master-slave network structure, the clock of the master device in the network system broadcasts the clock of the master device to the clock of the slave device on a regular basis, and all slave devices in the network system receive the time of the master device. Update its own clock after its own time, so as to realize the synchronization of all clocks in the network system. [0003] However, in an industrial contro...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H04J3/06H04L29/02
Inventor 冯冬芹章涵褚健金建祥
Owner SUPCON GRP