Interrupt nesting method for transplanting muCOS-II to ARM7

A nested and patterned technology, applied in the direction of program startup/switching, multi-program installation, etc., can solve problems such as program running errors and sub-functions cannot return correctly, and achieve the effect of avoiding errors

Active Publication Date: 2010-09-01
NO 513 INST THE FIFTH INST OF CHINA AEROSPACE SCI & TECH
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Problems solved by technology

However, there is a special case for the value of the connection register (LR), that is, the first-level interrupt processing includes calling a subfunction-jump instruction (BL), and the second instruction occurs just after the execution of the BL instruction is completed. Level interrupt, because the return address is saved in LR when the BL instruction ...

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  • Interrupt nesting method for transplanting muCOS-II to ARM7
  • Interrupt nesting method for transplanting muCOS-II to ARM7

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Embodiment Construction

[0035] The present invention will be described in detail below with reference to the drawings and embodiments.

[0036] In order to realize interrupt nesting and ensure the correctness of program operation when interrupt nesting occurs, program design must solve two key issues:

[0037] a. Before the next level interrupt is enabled, the site information of the previous level interrupt must be protected. The site information mainly includes LR, CPSR, R0~Rn. This problem is easier to implement, just push the information that needs to be protected into the stack.

[0038] b. Protect BL during interrupt processing to prevent it from failing to return correctly when calling sub-functions in interrupts.

[0039] Based on this, the present invention provides an interrupt nesting method ported from μCOS-II to ARM7. The basic idea is to change the processor mode before re-enabling the interrupt, and use the non-interrupt mode LR to record the BL instruction used Return address, so that when a...

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Abstract

The invention discloses an interrupt nesting method for transplanting muCOS-II to ARM7, which comprises the following steps: changing the mode of a processor before re-enabling interrupts, and adopting an LR in an uninterruptible mode to record a return address used by a BL command. Thus, when a new interrupt occurs, the interference of an LR register can not be caused, so the subfunction called in the interrupt can be accurately returned. The invention can ensure the accuracy of program run when the interrupt nesting appears.

Description

Technical field [0001] The invention relates to the technical field of software design, in particular to an interrupt nesting method transplanted from μCOS-II to ARM7. Background technique [0002] μCOS-II operating system is a complete, portable, solidifiable, tailorable, deprivable, deterministic, and preemptive real-time multitasking kernel. It always runs the highest priority ready task. The μCOS-II source code is open, and the number of interrupt nesting levels can reach 255. The V2.80 version can manage 255 tasks, and the source code line number is only about 5000 lines. Taking into account the requirements of reliability, stability, strong real-time performance and resources in some fields, the μCOS-II operating system can be transplanted to electronic equipment for task management. [0003] Moreover, many electronic devices currently require low power consumption, miniaturization, and high performance. Therefore, μCOS-II can be transplanted to ARM7. [0004] In the existin...

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Application Information

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IPC IPC(8): G06F9/48
Inventor 宋庆国宋光磊占丰刘中伟
Owner NO 513 INST THE FIFTH INST OF CHINA AEROSPACE SCI & TECH
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