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Semiconductor package and manufacturing method thereof

A manufacturing method and packaging technology, which can be used in semiconductor/solid-state device manufacturing, semiconductor devices, and semiconductor/solid-state device components, etc., and can solve the problems of chip chip breakage and unnecessary labor costs.

Active Publication Date: 2016-05-18
ADVANCED SEMICON ENG INC
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

The chip 2301 near the edge area A1 and the chips 2302 and 2303 near the alignment mark component 220 are broken
In particular, chip breakage cannot be detected automatically by the machine, and each chip must be inspected manually through an optical microscope, which increases the cost of manpower.

Method used

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  • Semiconductor package and manufacturing method thereof
  • Semiconductor package and manufacturing method thereof
  • Semiconductor package and manufacturing method thereof

Examples

Experimental program
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Effect test

Embodiment Construction

[0049]The present invention mainly proposes a semiconductor package and a manufacturing method thereof, so that the encapsulant for redistribution of chips has a supporting structure, so as to provide a uniform supporting force for the encapsulant of redistributed chips in a backside grinding process. In the following embodiments, the support structure can be disposed on the edge of the redistribution chip encapsulant, or under the alignment mark assembly, so that the entire redistribution chip encapsulant has substantially the same thickness and strength.

[0050] Please refer to image 3 , which shows a flowchart of a method for manufacturing a semiconductor package according to a preferred embodiment of the present invention. Also, please also refer to Figures 4A to 4G , which shows a schematic diagram of this fabrication method.

[0051] First, at image 3 Step 301 of and Figure 4A , a carrier 410 with an adhesive layer 412 is provided. Both surfaces of the adhesive ...

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PUM

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Abstract

The invention discloses a packaged semiconductor piece and a production method thereof. The production method comprises the following steps of: providing a carrier with a pasting layer; configuring a plurality of chips on the pasting layer, wherein the active surface of each chip faces the pasting layer; forming a sealing compound for covering the chips to form a sealing compound body provided with opposite first surface and second surface and fully distributed with the chips, wherein the first surface is provided with a chip region and a marginal region; removing the carrier and the pasting layer so that the sealing compound body fully distributed with the chips exposes the active surfaces of all the chips; forming a plurality of welded balls evenly in the chip region and the marginal region; grinding the second surface of the sealing compound body fully distributed with the chips for reducing the thickness of the sealing compound body fully distributed with the chips, wherein the welded balls provide an even supporting force for the sealing compound body fully distributed with the chips; and cutting the sealing compound body fully distributed with the chips to form a plurality of packaged pieces.

Description

technical field [0001] The present invention relates to a semiconductor package and its process, and in particular to a redistribution chip encapsulant level package and its packaging process (Chip-redistribution Encapsulant Level Package Process). Background technique [0002] In recent years, electronic devices have been vigorously used in daily life, and the industry is all committed to developing miniature and multi-functional electronic products to meet market demands. At present, the industry has introduced many different types of semiconductor packages. However, most of the packaging processes are to first cut the multiple dies on the encapsulant of the redistributed chip into individual dies, and then package each individual die. and test. [0003] Different from the traditional packaging technology that takes a single chip (die) as the processing target, the chip-redistribution encapsulant level package (Chip-redistribution Encapsulant Level Package) is based on th...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H01L21/50H01L21/56H01L21/60H01L21/78H01L23/31H01L23/482
CPCH01L24/96H01L21/568H01L2224/12105H01L2224/19H01L2924/3511
Inventor 谢爵安黄敏龙
Owner ADVANCED SEMICON ENG INC
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