Memory device and data access method for memory unit
A technology of data access and memory devices, which is applied in the field of data access of memory, and can solve problems such as system performance degradation and large data capacity
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[0066] figure 1 is a block diagram of the memory device 104 of the present invention. The memory device 104 is coupled to a host 102 to store data for the host 102 . The host 102 supports a native command queuing (NCQ) function. In one embodiment, the memory device 104 includes a controller 112 and at least one memory 114 . The controller 112 includes a command queue 122 and a register 124 . After the controller 112 receives a plurality of commands from the host 102 , the controller 112 stores the commands in the command queue 122 . Next, if there are multiple write commands in the command queue 122 , the controller 112 checks whether the logical address ranges accessed by the multiple write commands in the command queue 122 overlap with each other. If the logical address ranges accessed by multiple write commands in the command queue 122 overlap with each other, the controller 112 combines and stores multiple pieces of write data corresponding to the write commands in the...
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