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Substrate structure with die embedded inside and dual build-up layers over both side surfaces and method of the same

A technology of substrates and grains, which is applied in electrical components, electrical solid-state devices, circuits, etc., and can solve problems such as cost increase

Inactive Publication Date: 2012-10-10
KING DRAGON INT
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

cost also increases

Method used

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  • Substrate structure with die embedded inside and dual build-up layers over both side surfaces and method of the same
  • Substrate structure with die embedded inside and dual build-up layers over both side surfaces and method of the same
  • Substrate structure with die embedded inside and dual build-up layers over both side surfaces and method of the same

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Experimental program
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Embodiment Construction

[0105] The present invention will now be described with numerous references to inventive examples and accompanying drawings. It must be understood, however, that these referenced embodiments of the invention are for illustration purposes only. In addition to the reference embodiments mentioned here, the invention can be carried out in a wide variety of embodiments which are not mentioned in detail here. Moreover, the concept of the present invention shall not be limited by the description of the claims.

[0106] The invention discloses a crystal grain or multi-chip embedded substrate structure; the substrate has dual built up layers covering two surfaces. Figure 12 Figure 1 is a cross-sectional view of a system-in-package (system in package) structure. The above substrate has a die-embedded structure, double side build uplayers (double side build uplayers), and passive components, wafer level chip scale packaging (wafer level chip scale package, WL-CSP), chip scale package ...

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Abstract

A substrate structure comprises a first substrate with a die metal pad having a die formed thereon, a first wiring circuit and a second wiring circuit on the surfaces of first substrate, a second substrate having a die opening window for receiving the die, a third wiring circuit on top surface of the second substrate and a fourth wiring circuit on bottom surface of the second substrate, and an adhesive material filled into the gap between back side of the die and the top surface of the first substrate and between the side wall of the die and the side wall of the die receiving through hole andthe bottom side of the second substrate. In such a structure, laser is introduced to cut the back of the first substrate so as to form an opening, through which partial back of a chip / gold of die or gold / silver metallic layer is exposed to the outside.

Description

technical field [0001] The content of the present invention relates to an embedded diceinside substrate structure for forming a panel-type package; more particularly, a fan-out panel level package with double-sided overlay layers to increase reliability and reduce the size of this component (especially in terms of thickness). Background technique [0002] In the field of semiconductor components, as the size of the components continues to shrink, the density of the components also continues to increase. The technical requirements in terms of packaging or interconnection must also be improved to meet the above conditions. Traditionally, in a flip-chip attachment method, an array of solder bumps is formed on the surface of the die. The above solder bumps can be formed by using a solder composite material and passing through a solder mask to produce a desired solder bump pattern. The functions of the chip package include power distribution, signal distribution, heat dissipat...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H01L23/498H01L23/13H01L23/14H01L25/00H01L21/50
CPCH01L2924/15311H01L2924/19105H01L2924/10253H01L2224/16225H01L2224/04105H01L2224/12105H01L2224/32225H01L2224/73267H01L2224/92244H01L2924/00
Inventor 杨文焜
Owner KING DRAGON INT