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Independently controlled virtual memory devices in memory modules

A technology of virtual memory and memory module, applied in static memory, digital memory information, information storage and other directions, can solve the problems of random nature limitation and deterioration of efficiency

Active Publication Date: 2014-03-12
HEWLETT-PACKARD ENTERPRISE DEV LP
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

Since independent memory access requests from multiple threads are interleaved, the efficiency of this approach is limited by the random nature of memory access in general applications and is even worse in CMP memory systems

Method used

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  • Independently controlled virtual memory devices in memory modules
  • Independently controlled virtual memory devices in memory modules
  • Independently controlled virtual memory devices in memory modules

Examples

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Embodiment Construction

[0020] Various embodiments of the invention relate to multi-core memory modules designed to improve the energy efficiency of memory systems with less impact on system performance. A memory module includes memory chips that are divided into groups of one or more memory chips called "virtual memory devices" ("VMDs"). The memory chips may be dynamic random access memory ("DRAM") chips. Each VMD has its own data path and can receive separate memory requests over the command bus in a time-division multiplexed fashion. As a result, fewer memory chips are involved per memory access and fewer bits are stored back than conventional memory modules. The memory chip can be used without any modification, and few functional changes are added to the memory module registers to provide different commands to each VMD.

[0021] The detailed description is organized as follows. A general description of conventional memory modules and associated energy inefficiencies is described in the first s...

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Abstract

Various embodiments of the present invention are directed a multi-core memory modules. In one embodiment, a memory module (500) includes at least one virtual memory device and a demultiplexer register (502) disposed between the at least one virtual memory device and a memory controller. The demultiplexer register receives a command identifying one of the at least one virtual memory devices from the memory controller and sends the command to the identified virtual memory device. In addition, the at least one virtual memory devices include at least one memory chip.

Description

technical field [0001] Embodiments of the present invention relate to memory modules, and in particular, to memory modules configured to allow independent control of individual virtual memory devices comprising one or more memory chips. Background technique [0002] In modern computer systems, the demands on memory capacity and bandwidth keep increasing. Recent performance scaling of microprocessors has depended on increasing the number of cores per chip, and single-chip multiprocessors ("CMPs") with many cores and many cores require even higher memory bandwidth through multiple memory controllers per processor and capacity. Consequently, the power budget of the main memory module becomes similar to, or even higher than, the power budget of processors in current computer systems. [0003] However, typical memory modules are energy inefficient. For example, too many bits are activated per memory access, and most of the bits accessed are stored back unused, wasting dynamic ...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): G11C8/00G06F12/08
CPCG11C8/12G11C5/04G06F13/1668G06F12/06Y02D10/00G06F12/08G06F13/16G11C8/00G11C11/4063
Inventor 安廷镐N.P.朱皮J.B.莱弗里奇
Owner HEWLETT-PACKARD ENTERPRISE DEV LP