Automatic generation method for layout protection circuit of safety chip

Abstract

The invention discloses an automatic generation method for a layout protection circuit of a safety chip. The method is an automatic wiring method in an integrated circuit aided design software tool and belongs to the fields of layout and wiring in the integrated circuit aided design software tool. With the increasing popularity of the safety chip, a physical attack technology aiming at the safety chip is gradually mastered by hackers, therefore, the safety of the safety chip is seriously challenged. In order to prevent physical attack, a metal shield is manually arranged on the topmost layer of a metal layer in layout of an efficient circuit by chip design manufacturers; and a signal line of the shield is continuously monitored. At present, the protection circuit is designed through a manual method by domestic safety chip design enterprises, therefore, the efficiency is low and mistakes can be easily made. In the automatic generation method for the layout protection circuit provided by the invention, the layout protection circuit which completely covers the safety chip is automatically generated by a computer program, so that the work can be finished in an extremely short time, development efficiency is greatly increased, and correctness of the layout protection circuit is guaranteed.

Description

technical field [0001] The method for automatically generating a layout protection circuit of a security chip is an automatic wiring method in an integrated circuit aided design software tool. The invention belongs to the field of layout and wiring in integrated circuit aided design software tools. Background technique [0002] With the increasing popularity of security chips, the design technology of electronic passports, mobile payments, SIM cards and other related chips has gradually received attention. At the same time, the physical attack technology for security chips is gradually being mastered by hackers, which poses serious challenges to the security of security chips. [0003] At present, an effective attack method is an intrusive attack: the attacker uses a laser or a focused ion beam (FIB: Focused Ion Beam) to expose the internal signal of the IC to the surface, and uses a probe to connect the signal line to the attacker's electronic equipment. Then read the sec...

AI Technical Summary

Problems solved by technology

[0005] At present, domestic security chip design companies design protection circuits manually, which is inefficient and error-prone

According to statistics, for a 2 mm x 2 mm chip, if a layer of protective metal is placed on the top layer of the layout, about several million wiring patterns need to be generated, and it takes 3 to 4 design engineers to spend more than a week to complete the work.

In addition, it is difficult to ensure the correctness of wiring by artificially constructing layout protection circuits

Small negligence and mistakes will inevitably occur in the process of constructing the layout, which will lead to some hidden errors in the final layout graphics, which will eventually lead to chip protection failure

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