Nonlinear circuit time domain model reduction method and device

A nonlinear circuit and model reduction technology, applied in the direction of electrical digital data processing, special data processing applications, instruments, etc., can solve problems such as unpredictable and control, errors, etc., to improve accuracy, ensure error accuracy, and avoid error accumulation Effect

Active Publication Date: 2012-05-23
FUDAN UNIV
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  • Abstract
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  • Claims
  • Application Information

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Problems solved by technology

[0004] For nonlinear systems, more attention is paid to its time-domain characteristics. However, in the existing nonlinear model reduction methods, the fina

Method used

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  • Nonlinear circuit time domain model reduction method and device
  • Nonlinear circuit time domain model reduction method and device
  • Nonlinear circuit time domain model reduction method and device

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Embodiment 1

[0047] A typical example of the device applying the nonlinear circuit time-domain model reduction method of the present invention is a workstation that includes 4GB internal memory, Intel Xeon 3.0GHz processor and hard disk drive, and this workstation executes and implements the nonlinear circuit model reduction method of the present invention program of.

[0048] like figure 1 As shown, the present invention quickly analyzes the TPWL-wavelet method of nonlinear integrated circuits, comprising the following steps:

[0049] Step 201: Read the circuit netlist file and write it in the form of state space equation. The circuit netlist information includes linear components such as resistors and capacitors, nonlinear components such as MOS tubes, and input excitation signals of the circuit, etc. By reading the netlist, the state space equation corresponding to the nonlinear circuit can be obtained:

[0050] (1)

[0051] in is the state vector, re...

Embodiment 2

[0075] This embodiment is a nonlinear transmission line, which is composed of 500 unit modules, and the circuit Figure 4 As shown, each unit block contains linear resistors and capacitors and a non-linear resistor that satisfies the following relationship , one input node acts as a current source input, and the last node acts as a voltage output.

[0076] The present inventor uses the above-mentioned embodiment to use the inventive method and M. Rewienski and J. White 2003 in international periodical IEEE Trans. Comput.-Aided Design Integr. Circuits Syst. The method TPWL-Arnoldi proposed in "order reduction and fast simulation of nonlinear circuits and micromachined devices" performs model reduction, and compares the two methods in terms of order reduction order, order reduction accuracy, and simulation time after order reduction. The training input and test input of the two methods are shown in the figure respectively. Using the two methods to reduce the nonlinear trans...

Embodiment 3

[0080] This embodiment is a second-order telescopic amplifier, and its circuit diagram is as follows Image 6 shown. The circuit contains 28 MOS tubes. Also use the method TPWL-wavelet proposed by the present invention and the paper "A trajectory piecewise-linear approach to model order reduction" published in the international journal IEEE Trans. Comput.-Aided Design Integr. Circuits Syst. by M. Rewienski and J. White 2003 The method TPWL-Arnoldi proposed in "and fast simulation of nonlinear circuits and micromachined devices" reduces the circuit order from 83 to 8, and compares the order reduction errors of the two methods. The training input for both methods is ; use test input To test the accuracy of the reduced-order model. like Figure 7 As shown in the relative error curve in the figure, it can be seen that the method TPWL-wavelet proposed by the present invention has a lower order accuracy in the time domain than M. Rewienski and J. White2003 in the internationa...

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Abstract

The invention belongs to the field of design of an integrated circuit and relates to a nonlinear circuit time domain model reduction method and a nonlinear circuit time domain model reduction device. The method comprises the following steps of: forming a track in a state space through a 'training signal', and selecting an expansion point on the track to approach a nonlinear circuit through a segmented linear method; and obtaining a final reduction model through a time domain model reduction method based on wavelet collocation. The device comprises an input unit, an output unit, a program storage unit, an external bus, a memory, a storage management unit, an input/output bridging unit, a system bus and a processor. A nonlinear system is directly subjected to model reduction in a time domain, the time domain reduction accuracy of the nonlinear system can be guaranteed, and a time domain error can be controlled; therefore, an accurate and compact reduction model can be acquired, and the simulation accuracy and efficiency are improved.

Description

technical field [0001] The invention belongs to the field of integrated circuit design and relates to a method and device for reducing the order of a time-domain model of a nonlinear circuit. Background technique [0002] In order to shorten the circuit simulation time, model reduction methods are widely used in fast circuit simulation and modeling. With the maturity of the model reduction methods for linear time-invariant systems, the model reduction of nonlinear systems has gradually attracted attention. For weakly nonlinear systems, the model reduction method is mainly to expand the nonlinear system to a linear system near a certain equilibrium point, and then use the Krylov subspace projection method to generate the projection matrix of the linearized system [1-3 ] to get the reduced order system. Since the nonlinear system in this method is only approximated near an equilibrium point, these methods are only applicable to weakly nonlinear systems. [0003] For a stron...

Claims

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Application Information

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IPC IPC(8): G06F17/50
Inventor 曾璇杨帆宗可
Owner FUDAN UNIV
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