The invention belongs to the field of integrated circuits, and relates to a method and device for reducing an interconnection line model of a great quantity of ports. The method comprises the following steps of: constructing an undirected graph according to connection relationship of resistors and capacitors of an interconnection line circuit of a great quantity of ports, partitioning the undirected graph by utilizing a spectrum partitioning method, and finally carrying out coarse graining on nodes in a same partition set, thus obtaining a reduced circuit. The device comprises an input unit, an output unit, a program storage unit, an external bus, a memory, a storage management unit, an input and output bridging unit, a system bus and a processor; and an AMOR program of the reduction method can be realized through storage of the program storage unit. According to the invention, model reduction is carried out on the interconnection line of a great quantity of the ports without introduction of nonzero components, and the reduced model is ensured to be shorter in simulation time and higher in efficiency, and simultaneously the resistance value and capacitance of the obtained reduced circuit are positive values, thus having physical realizability and ensuring the passiveness of the reduced circuit.