Order reducing method for non-linear circuit model based on direct progection and variation analysis

A nonlinear circuit and model technology, applied in the electronic field, can solve problems such as poor precision of the reduced-order system, non-linear system cannot be reduced, and a large number of input ports

Inactive Publication Date: 2004-09-08
FUDAN UNIV
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Problems solved by technology

Similarly, the reduced-order error of the low-level subsystem (2) (3) will also enter the high-level subsystem (4), causing the accumulation of errors, resulting in poor accuracy of the reduced-order system
[0032] 2. The exponential growth of the input dimension of the high-level subsystem prevents the original nonlinear system from being reduced

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  • Order reducing method for non-linear circuit model based on direct progection and variation analysis
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  • Order reducing method for non-linear circuit model based on direct progection and variation analysis

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Embodiment Construction

[0100] The present invention is further illustrated below by specific examples.

[0101] by figure 1 Take the circuit in as an example, the number of nodes in the circuit is N=100, and the order of the nonlinear circuit model (1) obtained from this circuit is n=100. The input signal is a step signal, see figure 2 .

[0102] To reduce the order of this nonlinear system, first approximate (1) with the nonlinear approximation system (9), and then calculate the projection matrix. First calculate the matrix V 1 , where q 1 Take 7, that is, we orthogonalize the following 7 vectors

[0103] A -1 1 B,A -2 1 B,...A -7 1 B

[0104] Orthogonal technology is realized by using the existing algorithm Anorldi process. After orthogonalization we get V 1 .

[0105] for V 2 , first put A 2 After orthogonalizing the columns in Note that due to the usual A 2 There are many linearly related column vectors, so after orthogonalization, The number of column vec...

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Abstract

The model order reducing technology is one very useful technology for raising circuit simulating and verifying speed in improving circuit design scheme. The present invention establishes one kind of directly projecting method of reducing order of non-linear circuit model, and features the combination of direct projection and variation analysis in control theory. The sub-system obtained through variation analysis is used in constituting son projection matrix V1, V2, ..., Vn; and the relation between the original system and the son system is then used in constituting united projection matrix V. The projection matrix V is finally used in realizing direct projection of one approximate non-linear system on the original non-linear system. Compared with the order reducing the sub-system method, the present invention has greatly raised order reducing precision and efficiency.

Description

technical field [0001] The invention belongs to the field of electronic technology, and in particular relates to a model order reduction method for nonlinear circuits and systems. technical background [0002] Integrated circuits have been developed to the point where electronic systems containing more than 1 billion devices can be integrated on a single chip, that is, System on One Chip (SOC). For millions of large-scale circuits, how to quickly and accurately simulate and verify the correctness of its design within a reasonable time has become a bottleneck in the design of system-on-chip (SOC). According to statistics, the time for SOC chip simulation verification has accounted for 70% of the entire design time. [0003] At present, more and more SOC chips are digital-analog hybrid. In the design of analog integrated circuits and digital-analog hybrid circuits, because most of the analog circuits are nonlinear circuits, the time spent on transient, steady-state and spect...

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Application Information

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IPC IPC(8): G01R31/28G06F17/50G06G7/62H01L21/82
Inventor 曾璇冯丽红
Owner FUDAN UNIV
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