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Interpoly Dielectrics in Shielded Gate MOSFET Devices

A gate dielectric and polysilicon layer technology, which is applied in semiconductor devices, semiconductor/solid-state device manufacturing, circuits, etc., can solve the problem of not being able to independently optimize the gate dielectric

Active Publication Date: 2019-07-30
FAIRCHILD SEMICON CORP
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

This may make it impossible to optimize the gate dielectric and / or IPD layer independently

Method used

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  • Interpoly Dielectrics in Shielded Gate MOSFET Devices
  • Interpoly Dielectrics in Shielded Gate MOSFET Devices
  • Interpoly Dielectrics in Shielded Gate MOSFET Devices

Examples

Experimental program
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Embodiment Construction

[0020] figure 1 is a block diagram illustrating a cross-sectional view of a shielded gate trench metal oxide semiconductor field effect transistor (MOSFET) device 100 according to one embodiment. The shielded gate trench MOSFET device 100 may be referred to as a shielded MOSFET device because the MOSFET device includes a shield electrode 140 .

[0021] Such as figure 1 As shown in , an epitaxial layer 160 (eg, N-type) is disposed on a substrate (substrate) 162 (eg, N+ substrate). Source regions 166 (eg, N+ source regions) and body regions 164 (eg, heavy body regions, P+ This body area). Trench 110 extends through body region 160 and terminates in drift region 167 (which may also be referred to as an epitaxial region) within epitaxial layer 160 and / or in an N+ substrate (not shown). Trench 110 includes a shield oxide 130 disposed within trench 110 and surrounding (at least a portion of) shield electrode 120 , and shield oxide 130 is disposed (at least in part) by gate oxide...

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Abstract

The present invention provides a polysilicon interlayer dielectric in a shielded gate MOSFET device. In one general aspect, a device can include a shield dielectric disposed within a trench aligned along an axis in an epitaxial layer of a semiconductor and a shield electrode disposed within the shield dielectric and aligned along the axis. The device may include a first inter-poly dielectric and a second inter-poly dielectric, wherein the first inter-poly dielectric has a portion that intersects a plane perpendicular to the axis, wherein the A face intersects the shield electrode, and the second inter-polysilicon dielectric has a portion intersecting the face and disposed between the first inter-poly dielectric and the shield electrode. The device may also include a gate dielectric having a portion disposed on the first interpoly dielectric.

Description

[0001] related application [0002] This application claims U.S. Nonprovisional Patent Application Serial No. 13 / 049,655, entitled "Inter-Poly Dielectric in a Shielded Gate MOSFET Device," filed March 16, 2011 Priority and Interest, which is incorporated herein by reference in its entirety. technical field [0003] The present invention relates to an inter-poly dielectric (inter-poly dielectric) of a Metal Oxide Semiconductor Field Effect Transistor (MOSFET) device. Background technique [0004] Shielded gate trench MOSFET MOSFET devices have the advantage that the shield electrode can be used to reduce the gate-drain capacitance (C gd ) and / or increase the breakdown voltage of gate trench MOSFET devices. In known shielded gate trench MOSFETs, the trench may include a shield electrode disposed below the gate electrode. The shield electrode may be insulated from adjacent silicon regions by a shield oxide (eg, a shield dielectric), which is typically thicker than the gate o...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H01L29/40H01L21/336
CPCH01L29/401H01L29/407H01L29/4236H01L29/42368H01L29/4238H01L29/66734H01L29/7813
Inventor 迪安·E·普罗布斯特
Owner FAIRCHILD SEMICON CORP