Dummy pattern and method for forming dummy pattern

Abstract

The invention discloses a dummy pattern and a method for forming the dummy pattern. The method first provides a layout area, the layout area includes a layout pattern, and the layout pattern has a first density. Then, a plurality of first dummy patterns are inserted into the layout pattern. These first dummy patterns have a second density, and the second density corresponds to the first density. Next, the layout area is divided to define a plurality of sub-areas, each of which has a third density, the size of the first dummy patterns is adjusted according to the difference between the third density and the second density, and the layout pattern is combined with the third density. A dummy pattern is output onto the photomask.

Description

technical field [0001] The invention relates to a dummy pattern and a method for forming the dummy pattern, in particular to a dummy pattern used in a planarization process and a method for forming the dummy pattern. Background technique [0002] With the advancement of semiconductor technology, the dimensions of components in integrated circuits and the wiring connecting them continue to shrink, and in order to form fine patterns with high precision, the flatness of the substrate surface is also required to increase. In the known technology, a chemical mechanical polishing (CMP) process is often used as the main planarization process, and the grinding result of the chemical mechanical polishing (CMP) process has a great influence on the subsequently formed pattern. In detail, when a chemical mechanical polishing (CMP) process is performed, the polishing rate of the low pattern density region is higher than that of the high pattern density region. Therefore, regions with di...

AI Technical Summary

Problems solved by technology

Although the dummy pattern can improve the density difference between the low pattern density area and the high pattern density area, but with the complexity of integrated circuit design, more areas with different pattern densities are distributed on the wafer, so that the dummy pattern can improve the pattern density difference The effect is limited, and even the improvement effect of the dummy pattern on the pattern density difference is reduced

In addition, the known dummy patterns still have disadvantages such as insufficient resistance to stress generated between regions with different pattern densities on the substrate, elongated optical proximity correction (OPC), etc.

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