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A clock tracking method, system and network element

A clock tracking and clock technology, applied in the field of network communication, can solve the problems of slow frequency offset detection and affect service quality, and achieve the effect of reducing the impact

Active Publication Date: 2015-09-09
HUAWEI TECH CO LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0005] Embodiments of the present invention provide a clock tracking method, system, and network element to solve the problem that the frequency offset detection speed in the prior art is slow, resulting in a long time to switch the clock tracking source to an available system clock source, which affects the quality of service

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  • A clock tracking method, system and network element
  • A clock tracking method, system and network element
  • A clock tracking method, system and network element

Examples

Experimental program
Comparison scheme
Effect test

Embodiment 1

[0057] Embodiment 1, the embodiment of the present invention provides a clock tracking method, the method includes the following steps:

[0058] Step S201 , selecting an external input clock source in descending order of priority to perform frequency offset detection.

[0059] In this embodiment, the frequency offset is the frequency difference between the selected external input source and the internal clock source. The internal clock source may be a clock source generated by a crystal oscillator, a chip, or a VCO (Voltage-ontrolled Oscillator, voltage-controlled oscillator) inside the network element. The frequency offset detection method is not limited, and can be detected by hardware or software. System clock sources include external input clock sources and NE internal clock sources.

[0060] The network element can select the external input clock source for frequency offset detection according to the priority from high to low. Since the clock tracking source is selecte...

Embodiment 2

[0085]Embodiment 2, the embodiment of the present invention provides a clock tracking method, such as figure 2 As shown, NE1, NE2, NE3, NE4, and NE5 are network elements in the network, NE1, NE2, and NE3 are the external input clock sources of NE4, and NE4 is the external input clock source of NE5. The priority order of external input clock sources on NE4 is NE1, NE2, and NE3 from high to low. The clock tracking source of NE4 is NE1. The reference source frequency deviation detection range of NE4 is + / -4.6PPM. The internal clock source of NE1 The 38M crystal oscillator failed. The method specifically includes the following steps:

[0086] In step S301, NE4 first selects the external input clock source with the highest priority, that is, the external input clock source corresponding to NE1, to perform frequency offset detection.

[0087] Step S302, assuming that the frequency deviation threshold value is 4, and the frequency deviation error count of the external input clock ...

Embodiment 3

[0097] Embodiment 3, the embodiment of the present invention provides a clock tracking method, such as image 3 As shown, NE1, NE2, NE3, NE4, and NE5 are network elements in the network. NE1 and NE2 support or enable the frequency offset detection function, and NE3, NE4, and NE5 do not support or enable the frequency offset detection function. NE1 is the external input clock source of NE2, NE2 is the external input clock source of NE3, and NE3 is the external input clock source of NE4 and NE5. The clock tracking source of NE2 is NE1, the clock tracking source of NE3 is NE2, the reference source frequency deviation detection range of NE2 and NE3 is + / -4.6PPM, and the 38M crystal oscillator of the internal clock source of NE2 fails. The method specifically includes the following steps:

[0098] In step S401 , NE2 selects an external input clock source in descending order of priority to perform frequency offset detection. There is only one external input clock source on NE2 , th...

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Abstract

The invention relates to a network communication field. Particularly, the invention discloses a clock tracking method, which comprises the following steps: sequentially selecting external clock sources from high to low according to the priority level to carry out the frequency offset detection; if the frequency offset of the selected external input clock source exceeds the frequency offset detecting range of a standard source, adding one to an error count of the frequency offset of the selected external input clock source; if the error count of the frequency offset of the selected external input clock source after adding one is greater than the threshold value of the frequency offset, confirming the frequency offset failure generated by the selected external input clock source, setting the selected external input clock source as unavailable; if the selected external input clock source is unavailable as well as the current clock tracking source of a local network element, changing the clock tracking source of the local network element to be an available external input clock source with the highest priority level; if no available external input clock source is arranged on the local network element, changing the clock tracking source of the local network element to be an internal clock source of the local network element. The embodiment of the invention further discloses a clocking tracking system and a network element.

Description

technical field [0001] The invention relates to network communication technology, in particular to a clock tracking method, system and network element. Background technique [0002] In an SDH (Synchronous Digital Hierarchy, Synchronous Digital Hierarchy) network, SDH network elements are usually required to work in a synchronous or quasi-synchronous network environment to avoid pointer adjustment, equipment performance degradation, or data loss between network elements. However, during the network transmission of the clock reference source, the frequency deviation of the clock reference source may be too large or the performance may be degraded due to reasons such as transmission device failure. If network elements continue to track the clock reference source, a large number of pointer adjustments may occur, and even major accidents such as bit errors and service interruptions may occur. [0003] In the prior art, by monitoring the frequency offset of the current clock trac...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H04J3/06
Inventor 邓翰艾小平唐永华周小利
Owner HUAWEI TECH CO LTD