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High Supply Voltage Rejection Ratio No Off-Chip Capacitor Low Dropout Regulator

A low-dropout regulator, no off-chip capacitor technology, used in control/regulation systems, electrical variables, instruments, etc., can solve problems such as deteriorating LDO power supply rejection ratio

Active Publication Date: 2016-06-29
SHANGHAI HUAHONG GRACE SEMICON MFG CORP
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0004] In the prior art capacitorless low dropout voltage regulator (LDO), the output stage will introduce a Miller (Miller) compensation capacitor Cc to achieve the stability of the LDO, because the output VOUT of the output stage has an AC gain of the power supply VDD gain=1, the introduction of Miller capacitor Cc will deteriorate the power supply rejection ratio PSRR of the LDO mid-frequency band

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  • High Supply Voltage Rejection Ratio No Off-Chip Capacitor Low Dropout Regulator
  • High Supply Voltage Rejection Ratio No Off-Chip Capacitor Low Dropout Regulator
  • High Supply Voltage Rejection Ratio No Off-Chip Capacitor Low Dropout Regulator

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Embodiment Construction

[0016] The implementation of the present invention is described below through specific examples and in conjunction with the accompanying drawings, and those skilled in the art can easily understand other advantages and effects of the present invention from the content disclosed in this specification. The present invention can also be implemented or applied through other different specific examples, and various modifications and changes can be made to the details in this specification based on different viewpoints and applications without departing from the spirit of the present invention.

[0017] figure 2 It is a schematic circuit diagram of a low-dropout regulator with high power supply voltage rejection ratio and no off-chip capacitor in the present invention. Such as figure 2 As shown, the present invention has a high power supply voltage rejection ratio without off-chip capacitor low dropout regulator, including: error amplifier 20, output stage PMOS transistor MP1, fi...

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Abstract

The invention discloses a high-power-voltage-rejection-rate capacitor-free low-voltage-difference voltage regulator which comprises an error amplifier, an output electrode PMOS (p-channel metal oxide semiconductor) tube, a first compensating capacitor, a first resistor and a second resistor. A signal path with gain of -1 is introduced between power voltage and an output electrode of the error amplifier to balance out negative influence of the output electrode, and according to high power voltage rejection rate is achieved. By the voltage regulator, ideal high power voltage rejection rate is achieved.

Description

technical field [0001] The invention relates to a capacitor-less low-dropout voltage regulator, in particular to a low-dropout regulator with high power supply voltage rejection ratio and no off-chip capacitor. Background technique [0002] At present, more and more circuits sensitive to power supply parameters, such as phase-locked loop PLL and analog-to-digital converter ADC, have higher and higher requirements for the ripple PSRR (PowerSupplyRejectionRatio, power supply rejection ratio) of the power supply. Capacitorless low dropout regulator (LDOregulator). [0003] However, the power supply rejection ratio (PSRR) of common capless LDOs is generally poor in the IF band. figure 1 It is a schematic circuit diagram of a non-capacitor low dropout regulator in the prior art, such as figure 1 As shown, the capacitorless low dropout regulator includes an error amplifier 10, a PMOS transistor MP1, a compensation capacitor Cc, voltage dividing resistors R1, R2, and a load capac...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): G05F1/56
Inventor 徐光磊
Owner SHANGHAI HUAHONG GRACE SEMICON MFG CORP