4line-16line decoding circuit based on lipschitz restricting competition counting code
A technology that restricts competition counting and decoding circuits. It is applied in the field of decoding circuits. It can solve the problems of competition-adventure, the number of bit jumps is not constant, and it is inconvenient for system error correction, so as to reduce the bit error rate and improve The effect of self-correcting ability
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[0032] Below in conjunction with accompanying drawing, the present invention will be described in further detail:
[0033] The encoding code word that the present invention adopts is as shown in table 2:
[0034] Table 2
[0035] Hexadecimal number
Constraint Competitive Counting
[0036]
B3B2B1B0
0
0000
1
0001
2
1001
3
1011
4
0011
5
0111
6
0101
7
1101
8
1111
9
1110
A
0110
B
0100
C
1100
D
1000
E
1010
F
0010
[0037] The corresponding relationship between the input and output of the decoder is shown in the following table:
[0038] table 3
[0039]
[0040]
[0041] From Table 3, the expression of decoder output can be obtained as follows:
[0042] Y0=A3'A2'A1'A0'
[0043] Y1=A3′A2′A1′A0
[0044] Y2=A3A2′A1′A0
[0045] Y3=A3A2′A1A0
[0046] Y4=A3′A2′...
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