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Determination system and determination method

An adder, digital code technology, applied in the field of microprocessor instructions, can solve problems such as large space, occupying microprocessors, and increasing costs

Active Publication Date: 2013-10-23
VIA TECH INC
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

However, each 16-bit comparator takes up a lot of space in the microprocessor, thus increasing cost and reducing processing performance

Method used

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  • Determination system and determination method
  • Determination system and determination method
  • Determination system and determination method

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Embodiment Construction

[0048] The following examples illustrate to enable those of ordinary skill in the art to make and use the present disclosure. Modifications to the preferred embodiment will be readily apparent to those skilled in the art, and the general principles described herein may be applied to other embodiments. Therefore, the present invention is not intended to be limited to the particular embodiments presented and described herein, but is to be given the widest scope consistent with the principles and novel features disclosed herein.

[0049] The present invention notes that known microprocessors use many cycles to execute horizontal minimum instructions. When the present invention executes the same instruction, only a single cycle is needed, and the circuit will not be greatly increased. The present invention provides a system and method for quickly obtaining the minimum level. In order to make the features and advantages of the present invention more obvious and easy to understand,...

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Abstract

Judgment system and method. The system performs one of a level minimum instruction and an error absolute value summation instruction by a common adder circuit, and includes multiple adders, a summation circuit, a comparison circuit and a path selection circuit. The path selection circuit sends multiple digital codes to the adders according to the performed instruction. When the level minimum instruction is performed, the adders are sorted into adder pairs. Each adder pair provide a carry output and a transference output. Each adder pair has a high adder and a low adder. The high adder compares high section of a digital code pair of the digital codes. The low adder compares the low section of the digital code pair of the digital codes. According to the carry output and the transference output, a minimum digital code is found.

Description

[0001] This application is a divisional application of an invention patent application with an application date of September 07, 2010, an application number of 201010277155.1, and an invention title of "judgment system and method". technical field [0002] The present invention relates to a microprocessor instruction, in particular to a system and method for judging the smallest code from a set of digital values, wherein the smallest digital code is used as a horizontal minimum value (horizontal minimum). Background technique [0003] The current microprocessor (microprocessor) is often used to execute media instructions (Media Instruction) to increase the efficiency of multimedia applications. For example, the microprocessor architecture may include one or more media instructions to identify a horizontal minimum value from a set of digital codes, and the horizontal minimum value in a bus (bus) or a register (register) Corresponding location. A specific example is the PHMI...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G06F7/544G06F7/57
Inventor 罗沙尔.L.史托兹雷蒙.A.贝特伦
Owner VIA TECH INC