Dual profile shallow trench isolation apparatus and system

Abstract

The presented principles describe an apparatus and method of making the same, the apparatus being a semiconductor circuit device, having shallow trench isolation features bounding an active area and a periphery area on a semiconductor substrate to electrically isolate structures in the active area from structures in the periphery area. The shallow trench isolation feature bounding the active area is shallower than the shallow trench isolation feature bounding the periphery area, with the periphery area shallow trench isolation structure being formed through two or more etching steps.

Description

technical field [0001] The present invention relates to semiconductor devices, and in particular, to semiconductor devices utilizing shallow trench isolation. Background technique [0002] Complementary metal oxide semiconductor (CMOS) diodes are commonly used to sense images in cameras and other video or photographic devices. Recently, CMOS devices have been improved by using backside illumination (BSI). Typically, a photolithographic process deposits CMOS structures on top of a silicon wafer or other substrate. Early CMOS devices gathered light from the top (on the same side as the CMOS structure was applied). Metal interconnects deposited on the top surface of the CMOS substrate can block parts of the light-sensitive CMOS structures, reducing the quality of the picture and the sensitivity of the individual CMOS. BSI collects light from the backside of the CMOS substrate on which the CMOS sensor is deposited on the top surface, then grinding or otherwise thinning the su...

AI Technical Summary

Problems solved by technology

Metal interconnects deposited on the top surface of the CMOS substrate can block part of the light-sensitive CMOS structure, thereby reducing the quality of the picture and the sensitivity of the individual CMOS

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