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Memory error correction method based on reading instead of writing

An error correction method and memory technology, applied in static memory, instrumentation, error detection/correction, etc., can solve the problem of increasing the area of ​​the memory array by the supervision bit

Active Publication Date: 2018-08-21
XI AN UNIIC SEMICON CO LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0005] The present invention provides a memory error correction method using reading instead of writing, which mainly solves the problem that in the existing ECC encoding process, due to the existence of data masking, the encoding cannot be smoothly performed to generate supervisory bits or the area of ​​the storage array needs to be increased to generate supervisory bits.

Method used

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  • Memory error correction method based on reading instead of writing
  • Memory error correction method based on reading instead of writing
  • Memory error correction method based on reading instead of writing

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Embodiment Construction

[0020] to combine figure 1 , the existing ECC encoding can be performed according to the following steps:

[0021] First, 64-bit data from the outside is written directly ( figure 1 A);

[0022] Secondly, the ECC encoding (encoding) circuit uses this 64-bit external data to generate 7-bit or 8-bit supervisory bits through certain rules ( figure 1 B);

[0023] Again, new 64-bit data and 7 / 8-bit supervisory bits are written into the memory array and completely replace the previously stored information ( figure 1 C).

[0024] to combine figure 2 , the decoding and correction of the existing ECC is carried out according to the following steps:

[0025] First, 64 bits of data and 7 / 8 bits of supervisory bits are read from the memory array ( figure 2 C).

[0026] Secondly, the supervision bit will use certain rules to decode (decoding) to judge whether the data is wrong, if there is an error, which bit is wrong and correct (correct) the wrong data ( figure 2 B).

[0027...

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Abstract

A computer memory access method includes: receiving external data with a prefetching length, the external data having an unmasked first data portion and a masked second data portion; writing the unmasked first data portion to a corresponding data storage unit of a computer memory by a writing unit and reading a third data portion corresponding to the masked second data portion from the data storage unit by a reading unit; producing modified external data by merging the unmasked first data portion and the third data portion in place of the masked second data portion; generating parity bits from the modified external data by an error correction code encoding circuit according to a given rule; and then writing the parity bits to a parity bit storage unit of the computer memory by the writing unit, in substitution of previous information in the parity bit storage unit.

Description

technical field [0001] The invention relates to a memory error correction method, in particular to a memory error correction method using reading instead of writing. Background technique [0002] ECC (ErrorCorrectionCode) is used to detect and correct erroneous data. The data shows that there are many algorithms that can support ECC, such as the most commonly used Hamming code (HammingCode), 8-bit (bit) data requires 4 parity bits, and 64-bit data requires 7 parity bits. The appropriate algorithm can be selected by the data length and the number of bits to be detected and corrected. [0003] For different DDR structures (DDR1 / 2 / 3), typical data read (streamin-and-out) prefetch data lengths are 32 bits, 64 bits, and 128 bits. A reasonable compromise solution can use 7-bit or 8-bit supervision bits (according to different ECC algorithms) for 64-bit data, such as figure 1 and figure 2 shown. [0004] But it is not so simple to realize the function of detection and correct...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): G11C29/42
CPCG06F11/1048
Inventor 亚历山大
Owner XI AN UNIIC SEMICON CO LTD