Set reinforcement structure based on protection gate substitution circuit

Abstract

The invention discloses a SET reinforcement structure based on a protection gate substitution circuit. Specifically, the protection gate substitution circuit adopts dual signals for transmission, and when a single node is attacked, the signal of another node will not be affected; when the two signals are simultaneously When it is an unattacked signal, it can enter the hardened register at the same time to play a corresponding loading role; when one signal is attacked and the other is not attacked, because the two signals are different, they cannot play a corresponding loading role, thus resulting in SET can not be loaded to the back of the reinforcement register; on the basis of the protection gate replacement circuit proposed by the present invention and the existing reinforcement register, the reinforcement structure for the register clock network and the reinforcement structure for the register reset network are proposed, and the protection gate circuit When attacked by ions, the generated SET will not be passed to the subsequent hardened register to be converted into SEU.

Description

Technical field [0001] The present invention belongs to the field of microelectronic integrated circuit design, such as anti-radiation reinforcement technology in avionics, and specifically relates to the design of basic circuit units of aviation special integrated circuits. Background technique [0002] The high-energy ions in space include heavy particles, protons, alpha particles, neutrons, etc. They can cause single event effects in semiconductor devices, which seriously affect the reliability and life of spacecraft. The single event effect refers to the energy deposition of high-energy charged ions in the radiation when they pass through the sensitive area of ​​the electronic device, generating a large number of electron-hole pairs, which are collected by the N zone and the P zone during the drift process, resulting in instantaneous Pulse, the phenomenon that the logic state of the sensitive node of the device is affected. Among them, the single event effect (Single Event E...

AI Technical Summary

Problems solved by technology

Although triple redundancy is often used to harden registers against SEU effects, it is difficult to harden combinatorial logic against SET effects

This is because triple-mode redundancy will cause a large area overhead, which is difficult for designers to accept

Currently, the suppression of SET generally adopts the filtering scheme of delay unit + guard gate. For details, refer to A.Balasubramanian, B.L.Bhuva, J.D.Black, and L.W.Massengill, "RHBD Techniques for Mitigating Effects of Single-Event Hits Using Guard-Gates," IEEE Trans .Nucl.Sci., vol.52, no.6, pp.2531–2535, Dec.2005, the protection gate circuit structure shown in it is as follows figure 1 As shown, the protection gate circuit adopted will also produce SET phenomenon under the condition of single event attack

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