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Minimization Method of BVH Depth in Printed Circuit Board

A printed circuit board, minimization technology, applied in the direction of printed circuit, printed circuit manufacturing, printed component electrical connection formation, etc., can solve the problems of increasing defective rate, poor gold plating solution, reducing productivity, etc., to prevent the deviation of holes Burst of bits and holes, ensuring reliability, and improving productivity

Active Publication Date: 2017-03-01
SI FLEX CO LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0005] When the pre-treatment process such as plasma or desmear process cannot be satisfied, or the conditions required by BVH, such as figure 2 As shown, pollution and resin (resin) are not completely eliminated on the bottom surface and smear (smear) is produced. If the treatment is excessive, such as image 3 As shown, there is a void defect, so that the gold plating solution cannot penetrate smoothly during gold plating, resulting in a defect
[0006] As mentioned above, in addition to the plasma and desmear treatment, the aspect ratio can be secured due to the increase in the size of the surface BVH WINDOW, but when the BVH size is increased, such as Figure 4 As shown, misalignment and hole bursts occur during patterning work, so there are problems in reducing productivity and increasing the defective rate
[0007] In addition to this, other methods have been used to try to ensure the reliability of BVH, but other undesirable phenomena continue to occur, so it is difficult to ensure the reliability of BVH

Method used

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  • Minimization Method of BVH Depth in Printed Circuit Board
  • Minimization Method of BVH Depth in Printed Circuit Board
  • Minimization Method of BVH Depth in Printed Circuit Board

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Embodiment Construction

[0030] The method for minimizing the BVH depth of a printed circuit board according to the present invention will be described in detail below with reference to the accompanying drawings. In the drawings, the same components are denoted by the same symbols as far as possible. In addition, detailed descriptions of well-known functions and configurations that may unnecessarily obscure the gist of the present invention are omitted.

[0031] Figure 5 is a schematic flow chart of a method for minimizing the BVH depth of a printed circuit board according to an embodiment of the present invention, Figure 6 is a schematic diagram of the step of false jointing and laminating cover film according to an embodiment of the present invention, Figure 6 to Figure 8 is a photograph of a printed circuit board to which the BVH depth minimization method according to an embodiment of the present invention is applied.

[0032] Such as Figure 5 As shown, the present invention includes: the r...

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Abstract

A method of minimizing the depth of a BVH of a printed circuit board includes a raw material preparing step (S10) forming a circuit after cutting raw materials with a roll state into a constant size; a coverlay punching step (S20) punching a coverlay to be laminated on one surface or both surfaces of the raw materials prepared in the raw material preparing step (S10); a step (S30) of attaching and laminating the punched coverlay on one surface or both surfaces of the raw materials; a step (S40) of laminating a prepreg layer and a copper layer on the upper part of the laminated coverlay obtained in the step (S30); a copper layer hole processing step (S50) forming a hole on the laminated copper layer for forming the BVH; a prepreg layer hole processing step (S60) forming a hole on the upper part of the prepreg layer exposed by the hole formed in the copper layer hole processing step (S50); a de-smear processing step (S70) de-smearing the processed BVH; and a plating step (S80) performing plating after the de-smear processing step (S70).

Description

technical field [0001] The present invention relates to a method for minimizing the depth of a printed circuit board BVH, and more particularly, the present invention relates to a printed circuit board BVH that minimizes the depth (DEPTH) to ensure the reliability of the BVH when processing the BVH, thereby ensuring the stability of the gold plating operation Depth minimization method. Background technique [0002] At present, there is a demand for high-functionality of FPCB products, along with the formation of multi-layer and blind via holes (BVH). [0003] The blind hole (BVH) uses thin film (prepreg) and thin cover film (coverlay) that determine the depth of BVH. Although the depth of BVH becomes shallower, it cannot meet the total thickness required by customers, and the problem of deeper BVH depth occurs instead. . [0004] However, the deeper the BVH, the more difficult it is to ensure the reliability of the BVH. For this reason, most enterprises such as figure 1 A...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H05K3/40
CPCH05K3/0023H05K3/005H05K3/0055H05K3/281H05K3/429
Inventor 郑上镐郑义南
Owner SI FLEX CO LTD