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Pattern Matching Based Parasitic Extraction With Pattern Reuse

A technique for pattern and parameter extraction, applied in the field of pattern matching for parasitic extraction, which can solve problems such as performance limitations

Active Publication Date: 2014-05-21
TAIWAN SEMICON MFG CO LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

More accurate methods such as pure 3D extraction can be utilized, but have inherent performance limitations on extraction tools for large-scale designs

Method used

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  • Pattern Matching Based Parasitic Extraction With Pattern Reuse
  • Pattern Matching Based Parasitic Extraction With Pattern Reuse
  • Pattern Matching Based Parasitic Extraction With Pattern Reuse

Examples

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Embodiment Construction

[0030] The present invention is described with reference to the drawings, where like reference numerals are generally used to designate like elements and the various structures are not necessarily drawn to scale. In the following description, for purposes of explanation, numerous specific details are set forth in order to facilitate understanding. It will be apparent, however, to one skilled in the art that one or more aspects described herein may be practiced with less detail than these specific details. In other instances, well-known structures and devices are shown in block diagram form to facilitate understanding.

[0031] figure 1 A cross-sectional view 100 showing a comparison of a planar FET 102 and a finFET 104 is shown. Planar FET 102 includes source 106, drain 108, and gate 110, wherein source 106 and drain 108 also include an oxide definition (OD) material, and gate 110 also includes poly oxide (PO) Material. The finFET 104 includes a source 112 , a drain 114 an...

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PUM

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Abstract

The present disclosure relates to a method and apparatus for accurate RC extraction. A pattern database is configured to store layout patterns and their associated 3D extraction parameters. A pattern-matching tool is configured to partition a design into a plurality of patterns, and to search the pattern database for a respective pattern and associated 3D extraction parameters. If the respective pattern is already stored in the pattern database, then the associated 3D extraction parameters stored in the database are assigned to the respective pattern without the need to extract the respective pattern. If the respective pattern is not stored in the pattern database, then the extraction tool extracts the pattern and stores its associated 3D extraction parameters in the pattern database for future use. In this manner a respective pattern is extracted only once for a given design or plurality of designs. Moreover, the extraction result may be applied multiple times for a given design simultaneously, speeding up computation time. The extraction result may also be applied to a plurality of designs simultaneously.

Description

technical field [0001] The present invention relates generally to the field of semiconductors, and more particularly to pattern matching based on parasitic extraction of pattern reuse. Background technique [0002] In advanced semiconductor technologies such as node 20 or node 14, RC parasitics have become a major contributing factor. In less advanced technology nodes, approximation methods such as pre-characterization of the device and 2.5D extraction can be utilized to account for the effect of RC parasitics without too much loss of accuracy. Accurate RC parasitic modeling is necessary for device modeling, extraction and timing analysis. More accurate methods such as pure 3D extraction are available, but impose inherent performance limitations on large-scale designed extraction tools. Contents of the invention [0003] According to one aspect of the present invention, there is provided a method of RC extraction using pattern matching, comprising: verifying the consiste...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G06F17/50
CPCG06F30/398G06F30/367G06F30/00
Inventor 喻秉鸿林欣芸黄正仪王中兴
Owner TAIWAN SEMICON MFG CO LTD
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