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Programmable integrated circuits with redundant circuits

A technology of integrated circuits, circuits, applied in the direction of logic circuits using basic logic circuit components, logic circuits, logic circuits using specific components, etc.

Active Publication Date: 2017-10-27
ALTERA CORP
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

Redundancy schemes implemented using vertical wires extending over multiple rows and directly connecting to routing circuits in both destination rows require an undesirable amount of wire and area overhead

Method used

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  • Programmable integrated circuits with redundant circuits
  • Programmable integrated circuits with redundant circuits
  • Programmable integrated circuits with redundant circuits

Examples

Experimental program
Comparison scheme
Effect test

Embodiment 1

[0101] Additional Embodiment 1. An integrated circuit comprising: a logic region having a plurality of circuit rows including spare circuit rows; a plurality of routing segments, each routing segment having a first end coupled to a corresponding one of the circuit rows and coupled to a circuit row opposite second ends of adjacent ones of the rows; and a plurality of bypass circuits, each bypass circuit coupled between a corresponding pair of routing segments, wherein the bypass circuit is operable to operate when one of the plurality of circuit rows includes The spare row is switched to use when the circuit is defective, and wherein each routing segment is operable to use a respective one of the bypass circuits being driven by the associated routing segment.

Embodiment 2

[0102] Additional embodiment 2. The integrated circuit of additional embodiment 1, wherein the logic region comprises a programmable logic region.

Embodiment 3

[0103] Additional embodiment 3. The integrated circuit of additional embodiment 1, wherein the plurality of bypass circuits comprises a plurality of multiplexers.

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PUM

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Abstract

Programmable integrated circuits with redundant circuits, ie integrated circuits with repairable logic regions, are provided. Each connection area can be organized into a predetermined number of rows of logic circuits, one of which serves as a spare row. A repairable region can operate in normal mode or redundant mode. In normal mode, the alternate row is not active. When one of the logical region rows contains a defective circuit, the connected region operates in redundant mode such that the rows below the failed row are shifted down by one row and the spare row is brought in to act as the last row to repair the region. Each row may include a multiplexer and an associated driver that drives a corresponding vertical routing segment from one row to the next. Each vertical routing segment has the option of being driven by a logically equivalent vertical wire in the row immediately preceding it by configuring the corresponding multiplexer.

Description

[0001] This application claims priority to US Patent Application No. 13 / 669,244, filed November 5, 2012, the entire contents of which are hereby incorporated by reference. technical field [0002] The present invention relates to integrated circuits, and more particularly to programmable integrated circuits. Background technique [0003] Programmable integrated circuits contain programmable logic, which can be programmed to implement a desired custom logic design, and are therefore sometimes referred to as programmable logic devices (PLDs). Programmable logic device integrated circuits may also contain redundant circuitry. Redundant circuits can be used to repair defective PLDs, thus improving yield. [0004] Programmable logic devices are typically grouped into logic regions. Each of the logic regions on the programmable logic device includes a plurality of rows of logic and a spare row of logic. When a row in a logical region is determined to be defective (assuming the ...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H03K19/177G06F17/50
CPCH03K19/17736H03K19/17764
Inventor D·卡什曼
Owner ALTERA CORP