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A method and system for transmitting data between a multi-core processor and a disk array

A multi-core processor and disk array technology, applied in the field of data transmission between multi-core processors and disk arrays, can solve problems such as reducing the access efficiency of iSCSI disk arrays, and achieve the effect of efficient access

Active Publication Date: 2017-06-09
ZHENGZHOU SEANET TECH CO LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

The access to the iSCSI disk array requires the cooperation of the iSCSIHost. The iSCSIHost is usually implemented in a general-purpose operating system, and the data interaction between the operating system and upper-layer applications requires multiple data copies. The data sending and receiving of the TCP / IP protocol stack also requires Support for multiple data copies, so it will reduce the access efficiency of iSCSI disk array

Method used

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  • A method and system for transmitting data between a multi-core processor and a disk array
  • A method and system for transmitting data between a multi-core processor and a disk array
  • A method and system for transmitting data between a multi-core processor and a disk array

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Embodiment

[0060] The embodiment selects the OCTEON series processor platform of Cavium Networks Company, and uses the simple execution environment SE (Simple Executive) 114 provided by the OCTEON series processor platform as the upper-level application of the present invention and the operating environment of each system on the multi-core processor, providing core Inter-message transmission mechanism and memory application, release management mechanism.

[0061] The upper layer application 101, SCSI subsystem 103, iSCSI subsystem 104 and TCP / IP protocol stack subsystem 110 running on the simple execution environment SE (Simple Executive) 114 can run on one or more processing cores of the processor, and Connect with the iSCSI disk array 112 for data interaction. The upper layer application 101 uses the disk array access interface 102 to perform operations on the iSCSI disk array 112; the SCSI subsystem 103 is responsible for completing the mutual conversion between the operation of the u...

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Abstract

The present invention provides a method and system for transmitting data between a multi-core processor and a disk array. The method includes: step 101) setting the following layers from top to bottom based on the multi-core processor: upper layer application, SCSI subsystem Layer, iSCSI subsystem layer and TCP / IP protocol stack subsystem layer; step 102) the upper layer application, SCSI subsystem, iSCSI subsystem and TCP / IP protocol stack subsystem can all access all the managed by the multi-core processor The physical address space of the memory, and the physical address of the memory storing the data to be transmitted between the multi-core processor and the disk array and the length of the transmission data are encapsulated in the inter-core messages of the above-mentioned layers to transmit each other; wherein, when the upper-layer application, SCSI When the subsystem, the iSCSI subsystem and the TCP / IP protocol stack subsystem modify the transmission data stored in the memory, they modify the position of the pointer pointing to the memory and the length of the data in the memory in the inter-core messages of the above layers.

Description

technical field [0001] The invention relates to a high-speed transmission technology implementation method for a multi-core processor to access disk array data, in particular to a method and system for transmitting data between a multi-core processor and a disk array. Background technique [0002] With the continuous development of computer technology and network technology, traditional single-core processors can no longer meet the processor performance requirements of emerging network applications due to problems such as power consumption, concurrency, and heat dissipation, so they are more suitable for high-concurrency and low-latency networks. The application of multi-core processors is gradually being widely used. Multi-core processors use parallel physical processing cores to improve processor concurrency, and each processing core can use a lower main frequency to reduce processor power consumption, and multiple low main frequency processors are both scalable and diffic...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): G06F3/06
Inventor 郭秀岩张武查奇文尚秋里
Owner ZHENGZHOU SEANET TECH CO LTD