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Method for preparing semiconductor failure analysis sample

A technology for failure analysis samples and semiconductors, which is applied in the preparation of test samples, analysis materials, semiconductor/solid-state device testing/measurement, etc. It can solve problems such as rough cut surfaces, cracks in test area 20 cut surfaces, unfavorable photographing, etc., to achieve accurate The effect of feature size

Active Publication Date: 2014-06-18
SEMICON MFG INT (SHANGHAI) CORP
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  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

Not only that, the cutting machine can only cut the test chip 20 along the direction of the natural cracking of the wafer, so it is easy to cause the cut surface of the test area 20 to break and form a rough cut surface, which is not conducive to subsequent shooting for analysis. picture

Method used

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  • Method for preparing semiconductor failure analysis sample
  • Method for preparing semiconductor failure analysis sample
  • Method for preparing semiconductor failure analysis sample

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Embodiment Construction

[0029] For ease of understanding, below in conjunction with specific embodiment and image 3 The present invention is further described.

[0030] In the process of failure analysis of semiconductor failure analysis samples, there are generally three analysis methods: 1) focused ion beam (FIB), 2) transmission electron microscope (TEM), and 3) scanning electron microscope (SEM). Among them, the resolution of FIB is generally lower than that of SEM, the analysis pictures taken are blurred, and different film layers cannot be distinguished, and it is not easy to locate the target when the target is not on the surface; TEM sample preparation is quite cumbersome, and it is not easy to distinguish the different processes. Film layers of the same material; SEM can be soaked in chemicals first, which can distinguish different film layers, and can also distinguish film layers of the same material formed by different processes. The analysis pictures taken are relatively clear and have a...

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Abstract

The invention provides a method for preparing a semiconductor failure analysis sample. First, a test chip is cut to form an initial sample, and a cutting surface of a test key is exposed at one corner of the initial sample; and then, the corner, exposing the cutting surface of the test key, of the initial sample is cut to enable the cutting surface to be perpendicular to the arrangement direction of the test key, and therefore, the feature size of the test key can be accurately measured.

Description

technical field [0001] The invention relates to the field of semiconductor manufacturing, in particular to a method for preparing semiconductor failure analysis samples. Background technique [0002] With the development of the semiconductor manufacturing industry, the size and circuit parameters of semiconductor devices designed and manufactured are getting smaller and smaller, and there are more and more factors affecting the performance of semiconductor devices. Therefore, in the design process of semiconductor devices, in order to make the designed semiconductor devices have high reliability and effectiveness, it is generally necessary to prepare corresponding semiconductor device samples according to the design method of semiconductor devices, and conduct failure analysis on semiconductor device samples , and then according to the results of the failure analysis, the design scheme of the semiconductor device can be optimized, so that the reliability and effectiveness of...

Claims

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Application Information

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IPC IPC(8): H01L21/66G01N1/32
CPCG01N1/28G01N1/32G01N2001/2873H01L22/20
Inventor 刘文晓戴海波李日鑫李娟
Owner SEMICON MFG INT (SHANGHAI) CORP