Accurate-period simulation model for reconfigurable special processor core and hardware architecture thereof

Abstract

The invention relates to an accurate-period simulation model for a reconfigurable special processor core on the basis of a SystemC accurate-period model. The accurate-period simulation model comprises a control module, a transmission module and an operation module. The control module sends out configuration parameters and is used for controlling interaction with the exterior of the model and the working conditions of all modules in the model. The transmission module is used for receiving the configuration parameters sent by the control module and used for data transmission outside the special processor core and inside the special processor core. The operation modules are used for receiving the configuration parameters sent by the control module and carrying out operation according to the received configuration parameters and the set algorithm. The accurate-period simulation model has the advantages that a good soft hardware interface is provided on the basis of SystemC language modeling; sequential logic of hardware can be well simulated due to the fact that the model is accurate in period, and the problems can be found fast; compared with other simulation tools and verification platforms, a verification platform of the model is easy to set up, and the simulation velocity is high.

Description

technical field [0001] The invention relates to a reconfigurable special-purpose processor core cycle accurate model, which is suitable for digital circuit software and hardware system design verification, and provides a test simulation verification platform for the simulation and verification of the reconfigurable special-purpose processor core. Background technique [0002] With the exponential growth of SoC complexity, due to the high design complexity and long design cycle of the RTL level, the software design must wait until the hardware design is completed before the integration test, which will make the entire design cycle very long. . However, the SoC system is becoming more and more complex, which increases the construction period and shortens the time to market. The traditional RTL-level design can no longer meet the design requirements, forcing designers to seek a new design method, namely ESL (Electronic System Level) design. . In ESL design, the descriptio...

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Problems solved by technology

[0002] With the exponential growth of SoC complexity, due to the high design complexity and long design cycle of the RTL level, the software design must wait until the hardware design is completed before the integration test, which will make the entire design cycle very long.

However, the SoC system is becoming more and more complex, which increases the construction period and shortens the time to market. The traditional RTL-level design can no longer meet the design requirements, forcing designers to seek a new design method, namely ESL (Electronic System Level) design.

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